Datasheet

18-Bit Registers
CY74FCT16823T
CY74FCT162823T
SCCS062B - August 1994 - Revised September 2001
Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
Copyright © 2001, Texas Instruments Incorporated
Features
•I
off
supports partial-power-down mode operation
Edge-rate control circuitry for significantly improved
noise characteristics
Typical output skew < 250 ps
ESD > 2000V
TSSOP (19.6-mil pitch) and SSOP (25-mil pitch)
packages
Industrial temperature range of 40˚C to +85˚C
•V
CC
= 5V ± 10%
CY74FCT16823T Features:
64 mA sink current, 32 mA source current
Typical V
OLP
(ground bounce) <1.0V at V
CC
= 5V,
T
A
= 25˚C
CY74FCT162823T Features:
Balanced 24 mA output drivers
Reduced system switching noise
Typical V
OLP
(ground bounce) <0.6V at V
CC
= 5V,
TA = 25˚C
Functional Description
The CY74FCT16823T and the CY74FCT162823T 18-bit bus
interface registers are designed for use in high-speed,
low-power systems needing wide registers and parity. 18-bit
operation is achieved by connecting the control lines of the two
9-bit registers. Flow-through pinout and small shrink
packaging aids in simplifying board layout.
This device is fully specified for partial-power-down
applications using I
off
. The I
off
circuitry disables the outputs,
preventing damaging current backflow through the device
when it is powered down.
The CY74FCT16823T is ideally suited for driving
high-capacitance loads and low-impedance backplanes.
The CY74FCT162823T has 24-mA balanced output drivers
with current limiting resistors in the outputs. This reduces the
need for external terminating resistors and provides for
minimal undershoot and reduced ground bounce. The
CY74FCT162823T is ideal for driving transmission lines.
Logic Block Diagrams
C
Pin Configuration
D
R
1
2
3
4
5
6
7
8
9
10
11
12
33
32
31
30
29
36
35
1
CLR
34
SSOP/TSSOP
Top View
13
15
16
17
18
19
20
21
22
23
24
45
44
43
42
41
37
38
39
40
48
47
46
1
CLR
1
D
1
1
OE
1
OE
1
Q
1
1
Q
2
GND
V
CC
GND
FCT16823-1
1
CLK
1
CLKEN
1
Q
1
TO 8 OTHER CHANNELS
GND
1
D
1
1
D
2
1
D
3
1
D
4
1
CLK
GND
1
D
5
1
D
6
1
D
7
1
D
9
V
CC
GND
2
D
1
2
D
2
2
D
4
GND
2
D
5
2
D
6
2
D
7
2
D
8
V
CC
2
CLK
1
CLKEN
25
26
27
28
49
50
51
52
53
54
55
56
1
D
8
2
D
3
2
D
9
2
CLKEN
C
D
R
2
CLR
2
D
2
2
OE
2
CLK
2
CLKEN
2
Q
1
TO 8 OTHER CHANNELS
1
Q
3
1
Q
4
1
Q
5
1
Q
7
1
Q
8
1
Q
9
1
Q
6
14
2
Q
1
2
Q
2
2
Q
3
2
Q
4
2
Q
6
2
Q
7
2
Q
8
2
Q
5
2
Q
9
GND
V
CC
GND
2
OE
2
CLR
FCT16823-2
FCT16823-3

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