Datasheet

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DAC0830, DAC0832

www.ti.com

SNAS534B –MAY 1999–REVISED MARCH 2013

DAC0830/DAC0832 8-Bit μP Compatible, Double-Buffered D to A Converters

Check for Samples: DAC0830, DAC0832

FEATURES

KEY SPECIFICATIONS

234

• Double-Buffered, Single-Buffered or Flow-

• Current Settling Time: 1 μs

Through Digital Data Inputs

• Resolution: 8 bits

• Easy Interchange and Pin-Compatible with 12-

• Linearity: 8, 9, or 10 bits (Ensured Over

bit DAC1230 Series

Temp.)

• Direct Interface to All Popular

• Gain Tempco: 0.0002% FS/°C

Microprocessors

• Low Power Dissipation: 20 mW

• Linearity Specified with Zero and Full Scale

• Single Power Supply: 5 to 15 V

Adjust Only—NOT BEST STRAIGHT LINE FIT.

• Works with ±10V Reference-Full 4-Quadrant

DESCRIPTION

Multiplication

The DAC0830 is an advanced CMOS/Si-Cr 8-bit

• Can Be Used in the Voltage Switching Mode

multiplying DAC designed to interface directly with the

8080, 8048, 8085, Z80

, and other popular

• Logic Inputs Which Meet TTL Voltage Level

microprocessors. A deposited silicon-chromium R-2R

Specs (1.4V Logic Threshold)

resistor ladder network divides the reference current

• Operates “STAND ALONE” (without μP) if

and provides the circuit with excellent temperature

Desired

tracking characteristics (0.05% of Full Scale Range

maximum linearity error over temperature). The circuit

• Available in 20-Pin SOIC or PLCC Package

uses CMOS current switches and control logic to

achieve low power consumption and low output

leakage current errors. Special circuitry provides TTL

logic input voltage level compatibility.

Double buffering allows these DACs to output a

voltage corresponding to one digital word while

holding the next digital word. This permits the

simultaneous updating of any number of DACs.

The DAC0830 series are the 8-bit members of a

family of microprocessor-compatible DACs (MICRO-

DAC).

Typical Application

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2BI-FET is a trademark of Texas Instruments.

3Z80 is a registered trademark of Zilog Corporation.

4All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (29 pages)

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DAC0830, DAC0832 www.ti.com SNAS534B – MAY 1999 – REVISED MARCH 2013 DAC0830/DAC0832 8-Bit μP Compatible, Double-Buffered D to A Converters Check for Samples: DAC0830, DAC0832 FEATURES KEY SPECIFICATIONS • Double-Buffered, Single-Buffered or FlowThrough Digital Data Inputs • Easy Interchange and Pin-Compatible with 12bit DAC1230 Series • Direct Interface to All Popular Microprocessors • Linearity Specified with Zero and Full Scale Adjust Only—NOT BEST STRAIGHT LINE FIT.
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DAC0830, DAC0832 SNAS534B – MAY 1999 – REVISED MARCH 2013 www.ti.com Connection Diagrams (Top Views) Figure 1. PDIP, CDIP, and SOIC Packages Figure 2. PLCC Package These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
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DAC0830, DAC0832 www.ti.com SNAS534B – MAY 1999 – REVISED MARCH 2013 Operating Conditions TMIN≤TA≤TMAX Temperature Range Part numbers with “LCN” suffix 0°C to +70°C Part numbers with “LCWM” suffix 0°C to +70°C Part numbers with “LCV” suffix 0°C to +70°C Part numbers with “LCJ” suffix −40°C to +85°C −55°C to +125°C Part numbers with “LJ” suffix Voltage at Any Digital Input VCC to GND Electrical Characteristics VREF=10.000 VDC unless otherwise noted.
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DAC0830, DAC0832 SNAS534B – MAY 1999 – REVISED MARCH 2013 www.ti.com Electrical Characteristics (continued) VREF=10.000 VDC unless otherwise noted. Boldface limits apply over temperature, TMIN≤TA≤TMAX.(1) For all other limits TA=25°C. Parameter Conditions VCC=14.5V to 15.5V 0.0002 0.0025 11.5V to 12.5V 0.0006 4.5V to 5.5V 0.013 0.
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DAC0830, DAC0832 www.ti.com SNAS534B – MAY 1999 – REVISED MARCH 2013 Electrical Characteristics VREF=10.000 VDC unless otherwise noted. Boldface limits apply over temperature, TMIN≤TA≤TMAX. (1) For all other limits TA=25°C.
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DAC0830, DAC0832 SNAS534B – MAY 1999 – REVISED MARCH 2013 www.ti.com is high. WR2: Write 2 (active low). This signal, in combination with XFER, causes the 8-bit data which is available in the input latch to transfer to the DAC register. XFER: Transfer control signal (active low). The XFER will enable WR2. Other Pin Functions DI0-DI7: Digital Inputs. DI0 is the least significant bit (LSB) and DI7 is the most significant bit (MSB). IOUT1: DAC Current Output 1.
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DAC0830, DAC0832 www.ti.com SNAS534B – MAY 1999 – REVISED MARCH 2013 TI's linearity “end point test” (a) and the “best straight line” test (b,c) used by other suppliers are illustrated above. The “end point test'' greatly simplifies the adjustment procedure by eliminating the need for multiple iterations of checking the linearity and then adjusting full scale until the linearity is met. The “end point test'' ensures that linearity is met after a single full scale adjust. (One adjustment vs.
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DAC0830, DAC0832 SNAS534B – MAY 1999 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics 8 Digital Input Threshold vs. Temperature Digital Input Threshold vs. VCC Figure 7. Figure 8. Gain and Linearity Error Variation vs. Temperature Gain and Linearity Error Variation vs. Supply Voltage Figure 9. Figure 10. Write Pulse Width Data Hold Time Figure 11. Figure 12.
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DAC0830, DAC0832 www.ti.com SNAS534B – MAY 1999 – REVISED MARCH 2013 DAC0830 SERIES APPLICATION HINTS These DAC's are the industry's first microprocessor compatible, double-buffered 8-bit multiplying D to A converters. Double-buffering allows the utmost application flexibility from a digital control point of view. This 20pin device is also pin for pin compatible (with one exception) with the DAC1230, a 12-bit MICRO-DAC.
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DAC0830, DAC0832 SNAS534B – MAY 1999 – REVISED MARCH 2013 www.ti.com *TIE TO LOGIC 1 IF NOT NEEDED (SEE Double-Buffered Operation). Figure 13. Controlling Mutiple DACs Figure 14. The ILE pin is an active high chip select which can be decoded from the address bus as a qualifier for the normal CS signal generated during a write operation. This can be used to provide a higher degree of decoding unique control signals for a particular DAC, and thereby create a more efficient addressing scheme.
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DAC0830, DAC0832 www.ti.com SNAS534B – MAY 1999 – REVISED MARCH 2013 ILE=LOGIC “1”; WR2 and XFER GROUNDED Figure 15. Single-Buffered Operation In a microprocessor controlled system where maximum data throughput to the DAC is of primary concern, or when only one DAC of several needs to be updated at a time, a single-buffered configuration can be used. One of the two internal registers allows the data to flow through and the other register will serve as the data latch.
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DAC0830, DAC0832 SNAS534B – MAY 1999 – REVISED MARCH 2013 www.ti.com There are several recommendations to minimize this effect. When latching data in the DAC, always use the input register as the latch. Second, reducing the VCC supply for the DAC from +15V to +5V offers a factor of 5 improvement in the magnitude of the feedthrough, but at the expense of internal logic switching speed.
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DAC0830, DAC0832 www.ti.com SNAS534B – MAY 1999 – REVISED MARCH 2013 Basic Unipolar Output Voltage To maintain linearity of output current with changes in the applied digital code, it is important that the voltages at both of the current output pins be as near ground potential (0VDC) as possible. With VREF=+10V every millivolt appearing at either IOUT1 or IOUT2 will cause a 0.01% linearity error. In most applications this output current is converted to a voltage by using an op amp as shown in Figure 18.
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DAC0830, DAC0832 SNAS534B – MAY 1999 – REVISED MARCH 2013 www.ti.com Bipolar Output Voltage with a Fixed Reference The addition of a second op amp to the previous circuitry can be used to generate a bipolar output voltage from a fixed reference voltage. This, in effect, gives sign significance to the MSB of the digital input word and allows two-quadrant multiplication of the reference voltage.
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DAC0830, DAC0832 www.ti.com SNAS534B – MAY 1999 – REVISED MARCH 2013 Input Code MSB IDEAL VOUT LSB 11 1 1 1 1 1 1 11 0 0 0 0 0 0 10 0 0 0 0 0 0 01 1 1 1 1 1 1 00 1 1 1 1 1 1 00 0 0 0 0 0 0 +VREF −VREF Full-Scale Adjustment In the case where the matching of Rfb to the R value of the R-2R ladder (typically ±0.
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DAC0830, DAC0832 SNAS534B – MAY 1999 – REVISED MARCH 2013 www.ti.com This configuration offers several useful application advantages. Since the output is a voltage, an external op amp is not necessarily required but the output impedance of the DAC is fairly high (equal to the specified reference input resistance of 10 kΩ to 20 kΩ) so an op amp may be used for buffering purposes. Some of the advantages of this mode are illustrated in Figure 23, Figure 24, Figure 25, and Figure 26.
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DAC0830, DAC0832 www.ti.com SNAS534B – MAY 1999 – REVISED MARCH 2013 Figure 25. Bipolar Output with Increased Output Voltage Swing Figure 26. Single Supply DAC with Level Shift and Span- Adjustable Output Gain and Linearity Error Variation vs. Supply Voltage Gain and Linearity Error Variation vs. Reference Voltage Note: For these curves, VREF is the voltage applied to pin 11 (IOUT1) with pin 12 (IOUT2) grounded. Figure 27. Figure 28.
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DAC0830, DAC0832 SNAS534B – MAY 1999 – REVISED MARCH 2013 www.ti.com Gain and Linearity Error Variation vs. Temperature Figure 29. Miscellaneous Application Hints These converters are CMOS products and reasonable care should be exercised in handling them to prevent catastrophic failures due to static discharge. Conversion accuracy is only as good as the applied reference voltage so providing a stable source over time and temperature changes is an important factor to consider.
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DAC0830, DAC0832 www.ti.com SNAS534B – MAY 1999 – REVISED MARCH 2013 Applications Figure 30. DAC Controlled Amplifier (Volume Control) Figure 31.
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DAC0830, DAC0832 SNAS534B – MAY 1999 – REVISED MARCH 2013 www.ti.com Figure 32. Variable fO, Variable QO, Constant BW Bandpass Filter Figure 33.
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DAC0830, DAC0832 www.ti.com SNAS534B – MAY 1999 – REVISED MARCH 2013 Figure 34. Two Terminal Floating 4 to 20 mA Current Loop Controller • • • • DAC0830 linearly controls the current flow from the input terminal to the output terminal to be 4 mA (for D=0) to 19.94 mA (for D=255). Circuit operates with a terminal voltage differential of 16V to 55V. P2 adjusts the magnitude of the output current and P1 adjusts the zero to full scale range of output current.
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DAC0830, DAC0832 SNAS534B – MAY 1999 – REVISED MARCH 2013 www.ti.com REVISION HISTORY Changes from Revision A (March 2013) to Revision B • 22 Page Changed layout of National Data Sheet to TI format ..........................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Mar-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant DAC0832LCWMX SOIC DW 20 1000 330.0 24.4 10.9 13.3 3.25 12.0 24.0 Q1 DAC0832LCWMX/NOPB SOIC DW 20 1000 330.0 24.4 10.9 13.3 3.25 12.0 24.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Mar-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DAC0832LCWMX SOIC DW 20 1000 367.0 367.0 45.0 DAC0832LCWMX/NOPB SOIC DW 20 1000 367.0 367.0 45.
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MECHANICAL DATA NFH0020A N0020A N20A (Rev G) www.ti.
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