Datasheet

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DAC1220

Clock Generator

Serial

Interface

2nd−Order

∆Σ

Modulator

Instruction Register

Command Register

Data Register

Offset Register

Full−Scale Register

Microcontroller

1st−Order

Switched

Capacitor Filter

2nd−Order

Continuous

Time Post Filter

Modulator Control

AGNDX

OUT

REF

CS DV

DGND

SDIO

OUT

SCLK

DAC1220

www.ti.com

...................................................................................................................................... SBAS082G –FEBRUARY 1998–REVISED SEPTEMBER 2009

20-Bit, Low-Power

Digital-to-Analog Converter

Check for Samples: DAC1220

FEATURES

DESCRIPTION

• 20-Bit Monotonicity Ensured Over –40°C to

The DAC1220 is a 20-bit digital-to-analog (D/A)

+85°C

converter offering 20-bit monotonic performance over

the specified temperature range. It utilizes

• Low Power: 2.5mW

delta-sigma technology to achieve inherently linear

• Voltage Output

performance in a small package at very low power.

• Settling Time: 2ms to 0.012%

The resolution of the device can be programmed to

20 bits for Full-Scale, settling to 0.003% within 15ms

• Maximum Linearity Error: ±0.0015%

typical, or 16 bits for Full-Scale, settling to 0.012%

• On-Chip Calibration

within 2ms max. The output range is two times the

external reference voltage. On-chip calibration

APPLICATIONS

circuitry dramatically reduces low offset and gain

• Process Control

errors.

• ATE Pin Electronics

The DAC1220 features a synchronous serial

• Closed-Loop Servo Control

interface; in single-converter applications, the serial

• Smart Transmitters

interface can be accomplished with just two wires,

allowing low-cost isolation. For multiple converters, a

• Portable Instruments

CS signal allows for selection of the appropriate D/A

converter.

The DAC1220 has been designed for closed-loop

control applications in the industrial process control

market and high-resolution applications in the test

and measurement market. It is also ideal for remote

applications, battery-powered instruments, and

isolated systems. The DAC1220 is available in an

SSOP-16 package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (26 pages)

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DA DAC1220 C1 220 www.ti.com...................................................................................................................................... SBAS082G – FEBRUARY 1998 – REVISED SEPTEMBER 2009 20-Bit, Low-Power Digital-to-Analog Converter Check for Samples: DAC1220 FEATURES DESCRIPTION • The DAC1220 is a 20-bit digital-to-analog (D/A) converter offering 20-bit monotonic performance over the specified temperature range.
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DAC1220 SBAS082G – FEBRUARY 1998 – REVISED SEPTEMBER 2009...................................................................................................................................... www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
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DAC1220 www.ti.com...................................................................................................................................... SBAS082G – FEBRUARY 1998 – REVISED SEPTEMBER 2009 ELECTRICAL CHARACTERISTICS All specifications at TMIN to TMAX, AVDD = DVDD = +5V, fXIN = 2.5MHz, VREF = +2.5V, and 16-bit mode, unless otherwise noted.
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DAC1220 SBAS082G – FEBRUARY 1998 – REVISED SEPTEMBER 2009...................................................................................................................................... www.ti.com ELECTRICAL CHARACTERISTICS (continued) All specifications at TMIN to TMAX, AVDD = DVDD = +5V, fXIN = 2.5MHz, VREF = +2.5V, and 16-bit mode, unless otherwise noted.
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DAC1220 www.ti.com...................................................................................................................................... SBAS082G – FEBRUARY 1998 – REVISED SEPTEMBER 2009 TYPICAL CHARACTERISTICS At TA = +25°C, AVDD = DVDD = +5.0V, fXIN = 2.5MHz, VREF = 2.5V, C1 = 2.2nF, and calibrated mode, unless otherwise specified. POWER-SUPPLY REJECTION RATIO vs FREQUENCY LARGE-SIGNAL SETTLING TIME 60 5.0 4.5 4.0 3.5 40 3.0 (V) PSRR (dB) 50 30 2.5 2.0 20 1.5 1.
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DAC1220 SBAS082G – FEBRUARY 1998 – REVISED SEPTEMBER 2009...................................................................................................................................... www.ti.com THEORY OF OPERATION The DAC1220 is a monolithic 20-bit delta-sigma (ΔΣ) digital-to-analog converter (DAC) designed for applications requiring extremely high precision. The delta-sigma topology used in the DAC1220 ensures 20-bit monotonicity over the industrial temperature range.
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DAC1220 www.ti.com...................................................................................................................................... SBAS082G – FEBRUARY 1998 – REVISED SEPTEMBER 2009 Output Digital Connections The output voltage range is nominally 0V to 2 × VREF. It does not go below ground. The output amplifier is not designed for heavy loads; it can drive a maximum of 0.5mA. At power-on and during sleep mode, the amplifier is disconnected, so the output is high impedance.
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DAC1220 SBAS082G – FEBRUARY 1998 – REVISED SEPTEMBER 2009...................................................................................................................................... www.ti.com Serial Interface The DAC1220 can be operated from most SPI peripherals, or it can be bit-banged. Note that if SDIO is operated bidirectionally, it may be necessary to place a pullup resistor on the line, so that the line will not be floating.
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DAC1220 www.ti.com...................................................................................................................................... SBAS082G – FEBRUARY 1998 – REVISED SEPTEMBER 2009 DIGITAL INTERFACE Timing The serial interface is synchronous and controlled by the SCLK input. The DAC1220 latches incoming bits on the falling edge of SCLK, and shifts outgoing bits on the rising edge of SCLK.
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DAC1220 SBAS082G – FEBRUARY 1998 – REVISED SEPTEMBER 2009...................................................................................................................................... www.ti.com t9 t14 SCLK IN7 SDIO IN1 IN0 INM IN1 IN0 IN7 OUT1 OUT0 IN7 Write Register Data SDIO IN7 IN1 IN0 OUTM Read Register Data Figure 9.
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DAC1220 www.ti.com...................................................................................................................................... SBAS082G – FEBRUARY 1998 – REVISED SEPTEMBER 2009 The chip-select pin CS is active low. When CS is high, activity on SCLK is ignored. There are certain timing limits and delays which apply to the manipulation of CS, as shown in Figure 10. These must be observed, or the DAC1220 may malfunction. If CS is not used, it should be tied low.
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DAC1220 SBAS082G – FEBRUARY 1998 – REVISED SEPTEMBER 2009...................................................................................................................................... www.ti.com PROGRAMMING Commands Communication with the DAC1220 consists entirely of commands, which access the DAC1220 registers. Commands consist of a command byte followed by one, two or three data bytes.
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DAC1220 www.ti.com...................................................................................................................................... SBAS082G – FEBRUARY 1998 – REVISED SEPTEMBER 2009 Startup Sequence At startup, the following procedure should generally be followed to properly initialize the DAC1220: 1. If the DAC1220 is being clocked from a crystal, wait for the oscillator to start—at least 25ms—before attempting to communicate with it.
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DAC1220 SBAS082G – FEBRUARY 1998 – REVISED SEPTEMBER 2009...................................................................................................................................... www.ti.com Setting the Output Voltage To set the DAC1220 output voltage, write a code to the Data Input Register (DIR). A write to any of the bytes in the DIR causes the voltage to change at the completion of the write command. The DAC1220 operates in either 16- or 20-bit mode.
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DAC1220 www.ti.com...................................................................................................................................... SBAS082G – FEBRUARY 1998 – REVISED SEPTEMBER 2009 Fast Settling Mode To speed up settling, the DAC1220 can change the cutoff frequency of its output filter. Raising the cutoff frequency causes the DAC1220 to settle faster, but at the expense of higher noise.
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DAC1220 SBAS082G – FEBRUARY 1998 – REVISED SEPTEMBER 2009...................................................................................................................................... www.ti.com Table 13. Command Register Bits BIT(S) NAME 15 ADPT VALUE DESCRIPTION Controls adaptive filtering. if DISF is set, this bit has no effect. 0 Adaptive filtering enabled (default). 1 Adaptive filtering disabled. 0 Output is disconnected (high impedance) during calibration (default).
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DAC1220 www.ti.com...................................................................................................................................... SBAS082G – FEBRUARY 1998 – REVISED SEPTEMBER 2009 Table 13. Command Register Bits (continued) BIT(S) NAME 2 MSB 1-0 VALUE DESCRIPTION Selects the order in which bits are shifted in and out of the DAC1220, except when writing to the command register. The command register is always written to MSB first.
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DAC1220 SBAS082G – FEBRUARY 1998 – REVISED SEPTEMBER 2009...................................................................................................................................... www.ti.com APPLICATION INFORMATION Note that the delays are slightly different if chip-select (CS) is not being used. Layout Recommendations The DAC1220 is a high-precision analog component incorporating digital elements.
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DAC1220 www.ti.com...................................................................................................................................... SBAS082G – FEBRUARY 1998 – REVISED SEPTEMBER 2009 Isolation The DAC1220 serial interface allows for connection using as few as two wires. This is an advantage when galvanic isolation is required. An example isolated connection is shown in Figure 13. Here, chip-select is unused and therefore grounded, and the DAC1220 is being operated unidirectionally.
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DAC1220 SBAS082G – FEBRUARY 1998 – REVISED SEPTEMBER 2009...................................................................................................................................... www.ti.com REVISION HISTORY Changes from Revision F (March, 2008) to Revision G ................................................................................................. Page • Revised Table 4, Serial Interface Timing Characteristics; changed INSR to command for all occurrences ......................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 16-Aug-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device DAC1220E/2K5 Package Package Pins Type Drawing SSOP DBQ 16 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 12.4 Pack Materials-Page 1 6.4 B0 (mm) K0 (mm) P1 (mm) 5.2 2.1 8.0 W Pin1 (mm) Quadrant 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 16-Aug-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DAC1220E/2K5 SSOP DBQ 16 2500 367.0 367.0 35.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.