Datasheet
DAC
Latch1
WRT1
CLK1
CLK2
WRT2
DataInput
Port2
D[13:0]_2
DataInput
Port1
D[13:0]_1
l 1
OUT
Input
Latch1
Reference
ControlAmplifier
FSA2
REF
IN
FSA1
GSET
PD
DAC2904
l 2
OUT
+V
A
+V
D
+V
D
DAC
Latch2
Input
Latch2
AGNDDGNDDGND
I
OUT
2
I
OUT
1
DAC1
SegmentedSwitches
CurrentSources
DAC2
SegmentedSwitches
CurrentSources
I
OUT
DAC2904
R
L
R
L
+V
A
I
OUT
DAC2904
SBAS198C –AUGUST 2001–REVISED OCTOBER 2009..............................................................................................................................................
www.ti.com
Figure 18. Block Diagram of the DAC2904
given by the breakdown voltage of the CMOS
process, and exceeding it will compromise the
ANALOG OUTPUTS
reliability of the DAC2904, or even cause permanent
The DAC2904 provides two complementary current
damage. With the full-scale output set to 20mA, the
outputs, I
OUT
and I
OUT
. The simplified circuit of the
positive compliance equals 1.25V, operating with an
analog output stage representing the differential
analog supply of +V
A
= 5V. Note that the compliance
topology is shown in Figure 19. The output
range decreases to about 1V for a selected output
impedance of I
OUT
and I
OUT
results from the parallel
current of I
OUTFS
= 2mA. Care should be taken that
combination of the differential switches, along with
the configuration of DAC2904 does not exceed the
the current sources and associated parasitic
compliance range to avoid degradation of the
capacitances.
distortion performance and integral linearity.
Best distortion performance is typically achieved with
the maximum full-scale output signal limited to
approximately 0.5V
PP
. This is the case for a 50Ω
doubly terminated load and a 20mA full-scale output
current. A variety of loads can be adapted to the
output of the DAC2904 by selecting a suitable
transformer while maintaining optimum voltage levels
at I
OUT
and I
OUT
. Furthermore, using the differential
output configuration in combination with a transformer
will be instrumental for achieving excellent distortion
performance. Common-mode errors, such as
even-order harmonics or noise, can be substantially
reduced. This is particularly the case with high output
frequencies.
For those applications requiring the optimum
distortion and noise performance, it is recommended
Figure 19. Equivalent Analog Output
to select a full-scale output of 20mA. A lower
full-scale range down to 2mA may be considered for
applications that require a low power consumption,
The signal voltage swing that may develop at the two
but can tolerate a slightly reduced performance level.
outputs, I
OUT
and I
OUT
, is limited by a negative and
positive compliance. The negative limit of –1V is
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