Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsData collecting ICsData acquisition IC - DA converter (DAC) TSSOP 16

Table Of Contents

DACx578

Data Buffer A

DAC Register A

Buffer Control Register Control

Control Logic

Input Control Logic

Power-Down

Control Logic

REFIN

8-/10-/12-Bit

DAC

CLRLDACADDR0

SDA

SCL

Data Buffer B

DAC Register B

Data Buffer C

Data Buffer D

Data Buffer E

Data Buffer F

Data Buffer G

DAC Register C

DAC Register D

DAC Register E

DAC Register F

DAC Register G

V H

OUT

Data Buffer H

DAC Register H

V G

OUT

V F

OUT

V E

OUT

V D

OUT

V C

OUT

V B

OUT

V A

OUT

GNDADDR1

8-/10-/12-Bit

DAC

8-/10-/12-Bit

DAC

8-/10-/12-Bit

DAC

8-/10-/12-Bit

DAC

8-/10-/12-Bit

DAC

8-/10-/12-Bit

DAC

8-/10-/12-Bit

DAC

RSTSEL

DAC5578

DAC6578

DAC7578

www.ti.com

SBAS496A –MARCH 2010–REVISED AUGUST 2010

8-/10-/12-Bit, Octal-Channel, Ultra-Low Glitch, Voltage Output, Two-Wire Interface

Digital-to-Analog Converters

Check for Samples: DAC5578, DAC6578, DAC7578

FEATURES

DESCRIPTION

• Relative Accuracy:

The DAC5578 (8 bit), DAC6578 (10 bit), and

DAC7578 (12 bit) are low-power, voltage-output, octal

– DAC5578 (8 bit): 0.25LSB INL

channel, digital-to-analog converters (DACs). The

– DAC6578 (10 bit): 0.5LSB INL

devices are monolithic, provide good linearity,and

– DAC7578 (12 bit): 1LSB INL

minimize undesired code-to-code transient voltages

• Glitch Energy: 0.15nV-s (glitch).

• Power-On Reset to Zero Scale or Midscale

The devices use a versatile, 2-wire serial interface

that is I

C-compatible and operates at clock rates of

– Devices in the TSSOP Package Reset to

up to 3.4MHz. Multiple devices can share the same

Zero Scale

bus.

– Devices in the QFN Package Reset to Zero

The devices incorporate a power-on-reset (POR)

Scale or Midscale

circuit that ensures the DAC output powers up to

• Ultra-Low Power Operation: 0.13mA/ch at 5V

zero-scale or midscale until a valid code is written to

• Wide Power-Supply Range: +2.7V to +5.5V

the device. These devices also contain a power-down

• 2-Wire Serial Interface ( I

C™ compatible)

feature, accessed through the serial interface, that

reduces the current consumption of the devices to

• Temperature Range: –40°C to +125°C

typically 0.42mA at 5V. Power consumption is typically

2.32mW at 3V, reducing to 0.68mW in power-down

APPLICATIONS

mode. The low power consumption and small

• Portable Instrumentation

footprint make these devices ideal for portable,

• Closed-Loop Servo Control

battery-operated equipment.

• Process Control

The DAC5578, DAC6578, and DAC7578 are drop-in

• Data Acquisition Systems

and functionally-compatible with the DAC7678. All

devices are available in a 4x4, QFN-24 package and

a TSSOP-16 package.

RELATED DEVICES 8-BIT 10-BIT 12-BIT

Pin- and Function-Compatible

— — DAC7678

(w/internal reference)

Pin- and Function-Compatible DAC5578 DAC6578 DAC7578

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

C is a trademark of NXP Semiconductors.

3All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (55 pages)

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DAC5578 DAC6578 DAC7578 www.ti.com SBAS496A – MARCH 2010 – REVISED AUGUST 2010 8-/10-/12-Bit, Octal-Channel, Ultra-Low Glitch, Voltage Output, Two-Wire Interface Digital-to-Analog Converters Check for Samples: DAC5578, DAC6578, DAC7578 FEATURES DESCRIPTION • The DAC5578 (8 bit), DAC6578 (10 bit), and DAC7578 (12 bit) are low-power, voltage-output, octal channel, digital-to-analog converters (DACs).
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DAC5578 DAC6578 DAC7578 SBAS496A – MARCH 2010 – REVISED AUGUST 2010 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
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DAC5578 DAC6578 DAC7578 www.ti.com SBAS496A – MARCH 2010 – REVISED AUGUST 2010 ELECTRICAL CHARACTERISTICS At AVDD = 2.7V to 5.5V and over –40°C to +125°C, unless otherwise noted. PARAMETER TEST CONDITIONS DAC5578, DAC6578, DAC7578 MIN UNIT TYP MAX ±0.01 ±0.25 LSB ±0.01 ±0.
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DAC5578 DAC6578 DAC7578 SBAS496A – MARCH 2010 – REVISED AUGUST 2010 www.ti.com ELECTRICAL CHARACTERISTICS (continued) At AVDD = 2.7V to 5.5V and over –40°C to +125°C, unless otherwise noted. PARAMETER TEST CONDITIONS DAC5578, DAC6578, DAC7578 MIN TYP MAX UNIT AC PERFORMANCE (4) DAC output noise density TA = +25°C, at zero-code input, fOUT = 1kHz DAC output noise TA = +25°C, at midscale input, f = 0.1Hz to 10Hz 20 nV/√Hz 3 mVPP 60 µA EXTERNAL REFERENCE External reference current AVDD = 2.
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DAC5578 DAC6578 DAC7578 www.ti.
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DAC5578 DAC6578 DAC7578 SBAS496A – MARCH 2010 – REVISED AUGUST 2010 www.ti.com TIMING DIAGRAM tLOW Low Byte Ack Cycle tR tHD:STA tF SCL tHIGH tHD:STA tSU:STA tSU:STO tSU:DAT tHD:DAT SDA tBUF P S S P t1 LDAC1 t3 t2 LDAC2 t4 CLR (1) Asynchronous LDAC update mode. For more information and details, see the LDAC Functionality section. (2) Synchronous LDAC update mode. For more information and details, see the LDAC Functionality section. Figure 1.
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DAC5578 DAC6578 DAC7578 www.ti.com SBAS496A – MARCH 2010 – REVISED AUGUST 2010 TYPICAL CHARACTERISTICS: DAC at AVDD = 5.5 V At TA = 25°C, external reference used, DAC output not loaded, and all DAC codes in straight binary data format, DAC7578 graphs shown (unless otherwise noted). LINEARITY ERROR vs DIGITAL INPUT CODE (DAC7578, 12-Bit, –40°C) DIFFERENTIAL LINEARITY ERROR vs DIGITAL INPUT CODE (DAC7578, 12-Bit, –40°C) 1.0 0.25 All Eight Channels Shown External Reference = 5V 0.8 0.15 0.
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DAC5578 DAC6578 DAC7578 SBAS496A – MARCH 2010 – REVISED AUGUST 2010 www.ti.com TYPICAL CHARACTERISTICS: DAC at AVDD = 5.5 V (continued) At TA = 25°C, external reference used, DAC output not loaded, and all DAC codes in straight binary data format, DAC7578 graphs shown (unless otherwise noted). LINEARITY ERROR vs DIGITAL INPUT CODE (DAC6578, 10-Bit, -40°C) DIFFERENTIAL LINEARITY ERROR vs DIGITAL INPUT CODE (DAC6578, 10-Bit, -40°C) 0.5 0.5 All Eight Channels Shown External Reference = 5V 0.3 0.3 0.
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DAC5578 DAC6578 DAC7578 www.ti.com SBAS496A – MARCH 2010 – REVISED AUGUST 2010 TYPICAL CHARACTERISTICS: DAC at AVDD = 5.5 V (continued) At TA = 25°C, external reference used, DAC output not loaded, and all DAC codes in straight binary data format, DAC7578 graphs shown (unless otherwise noted). LINEARITY ERROR vs DIGITAL INPUT CODE (DAC5578, 8-Bit, -40°C) DIFFERENTIAL LINEARITY ERROR vs DIGITAL INPUT CODE (DAC5578, 8-Bit, -40°C) 0.25 0.25 All Eight Channels Shown External Reference = 5V 0.15 0.15 0.
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DAC5578 DAC6578 DAC7578 SBAS496A – MARCH 2010 – REVISED AUGUST 2010 www.ti.com TYPICAL CHARACTERISTICS: DAC at AVDD = 5.5 V (continued) At TA = 25°C, external reference used, DAC output not loaded, and all DAC codes in straight binary data format, DAC7578 graphs shown (unless otherwise noted). LINEARITY ERROR vs TEMPERATURE (DAC7578, 12-Bit) DIFFERENTIAL LINEARITY ERROR vs TEMPERATURE (DAC7578, 12-Bit) 1.0 0.8 0.25 External Reference = 5V 0.15 0.4 INL MAX DNL Error (LSB) INL Error (LSB) 0.6 0.
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DAC5578 DAC6578 DAC7578 www.ti.com SBAS496A – MARCH 2010 – REVISED AUGUST 2010 TYPICAL CHARACTERISTICS: DAC at AVDD = 5.5 V (continued) At TA = 25°C, external reference used, DAC output not loaded, and all DAC codes in straight binary data format, DAC7578 graphs shown (unless otherwise noted). POWER SUPPLY CURRENT vs TEMPERATURE OFFSET ERROR vs TEMPERATURE 4 1.4 3 1.3 1.2 1.1 1.0 1 0 -1 -2 0.
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DAC5578 DAC6578 DAC7578 SBAS496A – MARCH 2010 – REVISED AUGUST 2010 www.ti.com TYPICAL CHARACTERISTICS: DAC at AVDD = 5.5 V (continued) At TA = 25°C, external reference used, DAC output not loaded, and all DAC codes in straight binary data format, DAC7578 graphs shown (unless otherwise noted). SOURCE CURRENT AT POSITIVE RAIL SINK CURRENT AT NEGATIVE RAIL 0.6 5.00 Channel C DAC Loaded With 000h 0.5 Output Voltage (V) Output Voltage (V) 4.95 4.90 0.4 0.3 0.2 4.85 0.
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DAC5578 DAC6578 DAC7578 www.ti.com SBAS496A – MARCH 2010 – REVISED AUGUST 2010 TYPICAL CHARACTERISTICS: DAC at AVDD = 5.5 V (continued) At TA = 25°C, external reference used, DAC output not loaded, and all DAC codes in straight binary data format, DAC7578 graphs shown (unless otherwise noted). POWER SUPPLY CURRENT vs POWER SUPPLY VOLTAGE 1.4 1.4 1.2 1.3 Power Supply Current (mA) 1.0 0.8 0.6 0.4 0.
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DAC5578 DAC6578 DAC7578 SBAS496A – MARCH 2010 – REVISED AUGUST 2010 www.ti.com TYPICAL CHARACTERISTICS: DAC at AVDD = 5.5 V (continued) At TA = 25°C, external reference used, DAC output not loaded, and all DAC codes in straight binary data format, DAC7578 graphs shown (unless otherwise noted).
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DAC5578 DAC6578 DAC7578 www.ti.com SBAS496A – MARCH 2010 – REVISED AUGUST 2010 TYPICAL CHARACTERISTICS: DAC at AVDD = 5.5 V (continued) At TA = 25°C, external reference used, DAC output not loaded, and all DAC codes in straight binary data format, DAC7578 graphs shown (unless otherwise noted).
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DAC5578 DAC6578 DAC7578 SBAS496A – MARCH 2010 – REVISED AUGUST 2010 www.ti.com TYPICAL CHARACTERISTICS: DAC at AVDD = 5.5 V (continued) At TA = 25°C, external reference used, DAC output not loaded, and all DAC codes in straight binary data format, DAC7578 graphs shown (unless otherwise noted). DAC OUTPUT NOISE 0.
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DAC5578 DAC6578 DAC7578 www.ti.com SBAS496A – MARCH 2010 – REVISED AUGUST 2010 TYPICAL CHARACTERISTICS: DAC AT AVDD = 3.6 V At TA = 25°C, external reference used, DAC output not loaded, and all DAC codes in straight binary data format, DAC7578 graphs shown (unless otherwise noted). POWER SUPPLY CURRENT vs TEMPERATURE POWER SUPPLY CURRENT vs DIGITAL INPUT CODE 1.3 1.30 1.20 1.2 1.10 Power Supply Current - mA Power Supply Current (mA) External Reference = 3.3V 1.1 1.0 0.9 0.8 1.00 0.90 0.80 0.
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DAC5578 DAC6578 DAC7578 SBAS496A – MARCH 2010 – REVISED AUGUST 2010 www.ti.com TYPICAL CHARACTERISTICS: DAC AT AVDD = 2.7 V At TA = 25°C, external reference used, DAC output not loaded, and all DAC codes in straight binary data format, DAC7578 graphs shown (unless otherwise noted). LINEARITY ERROR vs DIGITAL INPUT CODE (DAC7578, 12-Bit, –40°C) DIFFERENTIAL LINEARITY ERROR vs DIGITAL INPUT CODE (DAC7578, 12-Bit, –40°C) 0.25 1.0 All Eight Channels Shown External Reference = 2.5V 0.8 0.15 0.
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DAC5578 DAC6578 DAC7578 www.ti.com SBAS496A – MARCH 2010 – REVISED AUGUST 2010 TYPICAL CHARACTERISTICS: DAC AT AVDD = 2.7 V (continued) At TA = 25°C, external reference used, DAC output not loaded, and all DAC codes in straight binary data format, DAC7578 graphs shown (unless otherwise noted). LINEARITY ERROR vs DIGITAL INPUT CODE (DAC6578, 10-Bit, –40°C) DIFFERENTIAL LINEARITY ERROR vs DIGITAL INPUT CODE (DAC6578, 10-Bit, –40°C) 0.5 0.5 All Eight Channels Shown External Reference = 2.5V 0.3 0.3 0.
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DAC5578 DAC6578 DAC7578 SBAS496A – MARCH 2010 – REVISED AUGUST 2010 www.ti.com TYPICAL CHARACTERISTICS: DAC AT AVDD = 2.7 V (continued) At TA = 25°C, external reference used, DAC output not loaded, and all DAC codes in straight binary data format, DAC7578 graphs shown (unless otherwise noted). LINEARITY ERROR vs DIGITAL INPUT CODE (DAC5578, 8-Bit, –40°C) DIFFERENTIAL LINEARITY ERROR vs DIGITAL INPUT CODE (DAC5578, 8-Bit, –40°C) 0.25 0.25 All Eight Channels Shown External Reference = 2.5V 0.15 0.
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DAC5578 DAC6578 DAC7578 www.ti.com SBAS496A – MARCH 2010 – REVISED AUGUST 2010 TYPICAL CHARACTERISTICS: DAC AT AVDD = 2.7 V (continued) At TA = 25°C, external reference used, DAC output not loaded, and all DAC codes in straight binary data format, DAC7578 graphs shown (unless otherwise noted). DIFFERENTIAL LINEARITY ERROR vs TEMPERATURE (DAC7578, 12-BIT) 1.00 0.25 0.80 External Reference = 2.5V 0.20 0.60 0.15 INL MAX 0.
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DAC5578 DAC6578 DAC7578 SBAS496A – MARCH 2010 – REVISED AUGUST 2010 www.ti.com TYPICAL CHARACTERISTICS: DAC AT AVDD = 2.7 V (continued) At TA = 25°C, external reference used, DAC output not loaded, and all DAC codes in straight binary data format, DAC7578 graphs shown (unless otherwise noted). POWER-SUPPLY CURRENT vs TEMPERATURE OFFSET ERROR vs TEMPERATURE 4 1.3 External Reference = 2.5V 3 1.0 0.9 0.
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DAC5578 DAC6578 DAC7578 www.ti.com SBAS496A – MARCH 2010 – REVISED AUGUST 2010 TYPICAL CHARACTERISTICS: DAC AT AVDD = 2.7 V (continued) At TA = 25°C, external reference used, DAC output not loaded, and all DAC codes in straight binary data format, DAC7578 graphs shown (unless otherwise noted). SOURCE CURRENT AT POSITIVE RAIL SINK CURRENT AT NEGATIVE RAIL 0.6 2.500 Channel A DAC Loaded With FFFh External Reference = 2.5V 2.495 2.485 Output Voltage (V) Output Voltage (V) 2.
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DAC5578 DAC6578 DAC7578 SBAS496A – MARCH 2010 – REVISED AUGUST 2010 www.ti.com TYPICAL CHARACTERISTICS: DAC AT AVDD = 2.7 V (continued) At TA = 25°C, external reference used, DAC output not loaded, and all DAC codes in straight binary data format, DAC7578 graphs shown (unless otherwise noted). POWER SUPPLY CURRENT DIGITAL INPUT CODE POWER SUPPLY CURRENT HISTOGRAM 18 1.30 AVDD = 2.7 V, External Reference = 2.5 V, Code Loaded to all Eight DAC Channels 1.20 16 1.00 14 0.90 12 % of Population 0.
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DAC5578 DAC6578 DAC7578 www.ti.com SBAS496A – MARCH 2010 – REVISED AUGUST 2010 TYPICAL CHARACTERISTICS: DAC AT AVDD = 2.7 V (continued) At TA = 25°C, external reference used, DAC output not loaded, and all DAC codes in straight binary data format, DAC7578 graphs shown (unless otherwise noted). CLOCK FEEDTHROUGH 400 kHz, MIDSCALE Clock Feedthrough Impulse ~ 0.5n V-s External Reference = 2.5 V POWER-ON GLITCH RESET TO ZERO SCALE VOUT - 2 mV/div ~ 1.8 mVPP External Reference = 2.
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DAC5578 DAC6578 DAC7578 SBAS496A – MARCH 2010 – REVISED AUGUST 2010 www.ti.com TYPICAL CHARACTERISTICS: DAC AT AVDD = 2.7 V (continued) At TA = 25°C, external reference used, DAC output not loaded, and all DAC codes in straight binary data format, DAC7578 graphs shown (unless otherwise noted). GLITCH ENERGY: 2.7V, 10-BIT, 1LSB STEP, FALLING EDGE GLITCH ENERGY: 2.7V, 10-BIT, 1LSB STEP, FALLING EDGE External Reference = 2.5 V From Code 200h to 201h VOUT - 1 mV/div External Reference = 2.
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DAC5578 DAC6578 DAC7578 www.ti.com SBAS496A – MARCH 2010 – REVISED AUGUST 2010 THEORY OF OPERATION DIGITAL-TO-ANALOG CONVERTER (DAC) The DAC5578, DAC6578, and DAC7578 (DACx578) architecture consists of eight string DACs each followed by an output buffer amplifier. Figure 111 shows a principal block diagram of the DAC architecture. VREF RDIVIDER VREF 2 R VREFIN 150kW 150kW 178kW DAC Register VOUTX REF(+) Resistor String REF(-) To Output Amplifier (2x Gain) R Figure 111.
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DAC5578 DAC6578 DAC7578 SBAS496A – MARCH 2010 – REVISED AUGUST 2010 www.ti.com TWO-WIRE, I2C-COMPATIBLE INTERFACE The two-wire serial interface used by the DACx578 is I2C-compatible (refer to the I2C Bus Specification). The bus consists of a data line (SDA) and a clock line (SCL) with pull-up resistors. When the bus is idle, both SDA and SCL lines are pulled high. All I2C-compatible devices connect to the I2C bus through open-drain I/O pins SDA and SCL.
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DAC5578 DAC6578 DAC7578 www.ti.com SBAS496A – MARCH 2010 – REVISED AUGUST 2010 slave. All I2C-compatible devices recognize the stop condition. Upon receipt of a stop condition, the bus is released, and all slave devices then wait for a start condition followed by a matching address. SDA SCL Data Line Stable; Data Valid Change of Data Allowed Figure 115. I2C Bus Bit Transfer HS Mode Protocol • When the bus is idle, both the SDA and SCL lines are pulled high by the pull-up resistors.
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DAC5578 DAC6578 DAC7578 SBAS496A – MARCH 2010 – REVISED AUGUST 2010 www.ti.com Recognize START or REPEATED START Condition Recognize STOP or REPEATED START Condition Generate ACKNOWLEDGE Signal P SDA Acknowledgement Signal From Slave MSB Sr Address R/W SCL 1 2 7 8 9 S or Sr 1 2 3 - 8 ACK 9 Clock Line Held Low While Interrupts are Serviced START or REPEATED START Condition Sr or P ACK REPEATED START or STOP Condition Figure 116. I2C Bus Protocol Table 1.
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DAC5578 DAC6578 DAC7578 www.ti.com SBAS496A – MARCH 2010 – REVISED AUGUST 2010 Table 4. Address Format For TSSOP-16 (PW) Package SLAVE ADDRESS ADDR0 1001 000 0 1001 010 1 1001 100 Float register is being accessed when writing to or reading from the DACx578. See Table 6 for a list of write and read commands. Command and Access (CA) Byte The command and access byte, as shown in Table 5, controls which command is executed and which Table 5.
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DAC5578 DAC6578 DAC7578 SBAS496A – MARCH 2010 – REVISED AUGUST 2010 Most Significant Data Byte (MSDB) and Least Significant Data Byte (LSDB) The MSDB and LSDB contain the data that are passed to the register(s) specified by the CA byte, as shown in Table 7 and Table 8. See Table 14 for a complete list of write sequences and Table 15 for a complete list of read sequences. The DACx578 updates at the falling edge of the acknowledge signal that follows the LSDB[0] bit.
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DAC5578 DAC6578 DAC7578 www.ti.com SBAS496A – MARCH 2010 – REVISED AUGUST 2010 Table 7. Most Significant Data Byte (MSDB) MSB LSB DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB1 DB0 Table 8. Least Significant Data Byte (LSDB) MSB LSB DB7 DB6 DB5 DB4 DB3 DB2 Table 9. Broadcast Address Command MSB LSB 1 0 0 0 1 1 1 0 Table 10.
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DAC5578 DAC6578 DAC7578 SBAS496A – MARCH 2010 – REVISED AUGUST 2010 www.ti.com Table 14.
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DAC5578 DAC6578 DAC7578 www.ti.com SBAS496A – MARCH 2010 – REVISED AUGUST 2010 Table 14.
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DAC5578 DAC6578 DAC7578 SBAS496A – MARCH 2010 – REVISED AUGUST 2010 www.ti.com Table 14.
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DAC5578 DAC6578 DAC7578 www.ti.com SBAS496A – MARCH 2010 – REVISED AUGUST 2010 Table 15.
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DAC5578 DAC6578 DAC7578 SBAS496A – MARCH 2010 – REVISED AUGUST 2010 POWER-ON RESET TO ZERO-SCALE OR MIDSCALE The DACx578 contains a power-on reset (POR) circuit that controls the output voltage during power-on. For devices in the TSSOP package, at power-on, all DAC registers are filled with zeros and the output voltages of all DAC channels are set to zero-scale. For devices in the QFN package, all DAC registers are set to have all DAC channels power on depending of the state of the RSTSEL pin.
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DAC5578 DAC6578 DAC7578 www.ti.com SBAS496A – MARCH 2010 – REVISED AUGUST 2010 For example: C3, C2, C1, and C0 = '0100' and DB14 and DB13 = '11' represent a power-down condition with High-Z output impedance for a selected channel. DB14 and DB13 = '01' represents a power-down condition with 1kΩ output impedance, while DB14 and DB13 = '10' represents a power-down condition with 100kΩ output impedance. Table 16.
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DAC5578 DAC6578 DAC7578 SBAS496A – MARCH 2010 – REVISED AUGUST 2010 www.ti.com OPERATING EXAMPLES: DAC7578 For the following examples X = don’t care; value can be either '0' or '1'.
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DAC5578 DAC6578 DAC7578 www.ti.com SBAS496A – MARCH 2010 – REVISED AUGUST 2010 APPLICATION INFORMATION DAC NOISE PERFORMANCE Output noise spectral density at the VOUTX pin versus frequency is depicted in Figure 55 for full-scale, midscale, and zero-scale input codes. The typical noise density reduces to 104nV/√Hz at 1kHz for mid scale code with external reference as shown in Figure 55. Integrated output noise between 0.1Hz and 10Hz is close to 3µVPP (midscale), as shown in Figure 56.
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DAC5578 DAC6578 DAC7578 SBAS496A – MARCH 2010 – REVISED AUGUST 2010 www.ti.com CONNECTING MULTIPLE DEVICES Multiple devices of DACx578 family can be connected on the same bus. Using the address pin, the DACx578 can be set to one of three different I2C addresses for the TSSOP package and one of eight addresses for the QFN package. An example showing three DACx578 devices in TSSOP package is shown if Figure 120. Note that only one set of pull-up resistors is needed per bus.
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DAC5578 DAC6578 DAC7578 www.ti.com SBAS496A – MARCH 2010 – REVISED AUGUST 2010 PARAMETER DEFINITIONS With the increased complexity of many different specifications listed in product data sheets, this section summarizes selected specifications related to digital-to-analog converters. STATIC PERFORMANCE Static performance parameters are specifications such as differential nonlinearity (DNL) or integral nonlinearity (INL). These are dc specifications and provide information on the accuracy of the DAC.
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DAC5578 DAC6578 DAC7578 SBAS496A – MARCH 2010 – REVISED AUGUST 2010 Monotonicity Monotonicity is defined as a slope whose sign does not change. If a DAC is monotonic, the output changes in the same direction or remains at least constant for each step increase (or decrease) in the input code. DYNAMIC PERFORMANCE Dynamic performance parameters are specifications such as settling time or slew rate, which are important in applications where the signal rapidly changes and/or high frequency signals are present.
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DAC5578 DAC6578 DAC7578 www.ti.com SBAS496A – MARCH 2010 – REVISED AUGUST 2010 LAYOUT A precision analog component requires careful layout, adequate bypassing, and clean, well-regulated power supplies. The DACx578 offers single-supply operation, and is often used in close proximity with digital logic, microcontrollers, microprocessors, and digital signal processors.
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DAC5578 DAC6578 DAC7578 SBAS496A – MARCH 2010 – REVISED AUGUST 2010 www.ti.com REVISION HISTORY Changes from Original (March 2010) to Revision A • 46 Page Changed Changed the data sheet From: Product Preview To: Production Data. ................................................................
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MECHANICAL DATA MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0,30 0,19 0,65 14 0,10 M 8 0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 7 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 8 14 16 20 24 28 A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 DIM 4040064/F 01/97 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 16-Aug-2010 Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant DAC5578SPWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 DAC5578SRGER VQFN RGE 24 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 DAC5578SRGET VQFN RGE 24 250 180.0 12.4 4.25 4.25 1.15 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DAC5578SPWR DAC5578SRGER TSSOP PW 16 2000 367.0 367.0 35.0 VQFN RGE 24 3000 367.0 367.0 35.0 DAC5578SRGET VQFN RGE 24 250 210.0 185.0 35.0 DAC6578SPWR TSSOP PW 16 2000 367.0 367.0 35.0 DAC6578SRGER VQFN RGE 24 3000 367.0 367.0 35.0 DAC6578SRGET VQFN RGE 24 250 210.0 185.0 35.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.