Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsData collecting ICsData acquisition IC - DA converter (DAC) SOT 23 8

APPLICATIONS

● PROCESS CONTROL

● DATA ACQUISITION SYSTEMS

● CLOSED-LOOP SERVO-CONTROL

● PC PERIPHERALS

● PORTABLE INSTRUMENTATION

● PROGRAMMABLE ATTENUATION

Low-Power, Rail-to-Rail Output, 12-Bit Serial Input

DIGITAL-TO-ANALOG CONVERTER

DESCRIPTION

The DAC7513 is a low-power, single, 12-bit buffered voltage

output Digital-to-Analog Connector (DAC). The on-chip preci-

sion output amplifier allows rail-to-rail output swing to be

achieved. The DAC7513 uses a versatile 3-wire serial inter-

face that operates at clock rates up to 30MHz and is compat-

ible with standard SPI

™

, QSPI

™

, Microwire

™

, and DSP inter-

faces.

The DAC7513 requires an external reference voltage to set

the output range of the DAC, this allows the DAC7513 to be

used in a multiplying mode. The DAC7513 incorporates a

power-on reset circuit which ensures that the DAC output

powers up at 0V and remains there until a valid write takes

place to the device. The DAC7513 contains a power-down

feature, accessed over the serial interface, that reduces the

current consumption of the device to 200nA at 5V.

The low-power consumption of this part in normal operation

makes it ideally suited to portable battery-operated equip-

ment. The power consumption is 0.5mW at 5V reducing to

1µW in power-down mode.

The DAC7513 is available in an SOT23-8 package and an

MSOP-8 package.

DAC7513

FEATURES

●

micro

POWER OPERATION:

115

A at 5V

● POWER-ON RESET TO ZERO

● POWER SUPPLY: +2.7V to +5.5V

● ENSURED MONOTONIC BY DESIGN

● SETTLING TIME: 10µs to 1LSB

● LOW-POWER SERIAL INTERFACE WITH

SCHMITT-TRIGGERED INPUTS

● ON-CHIP OUTPUT BUFFER AMPLIFIER,

RAIL-TO-RAIL OPERATION

● SYNC INTERRUPT FACILITY

● SOT23-8 AND MSOP-8 PACKAGES

Shift Register

DAC Register

12-Bit DAC

Ref (+)

Power-Down

Control Logic

Resistor

Network

GND

OUT

SYNC

REF

CLK

SPI and QSPI are registered trademarks of Motorola.

Microwire is a registered trademark of National Semiconductor.

DAC7513

SBAS157A – OCTOBER 2000 – REVISED MARCH 2003

www.ti.com

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Summary of content (27 pages)

PAGE 1
DAC7513 DAC 751 3 SBAS157A – OCTOBER 2000 – REVISED MARCH 2003 Low-Power, Rail-to-Rail Output, 12-Bit Serial Input DIGITAL-TO-ANALOG CONVERTER FEATURES DESCRIPTION ● microPOWER OPERATION: 115µA at 5V ● POWER-ON RESET TO ZERO ● POWER SUPPLY: +2.7V to +5.
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ABSOLUTE MAXIMUM RATINGS(1) ELECTROSTATIC DISCHARGE SENSITIVITY VDD to GND ........................................................................... –0.3V to +6V Digital Input Voltage to GND ................................. –0.3V to +VDD + 0.3V VOUT to GND .......................................................... –0.3V to +VDD + 0.3V Operating Temperature Range ...................................... –40°C to +105°C Storage Temperature Range .........................................
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MARKING ARTWORK Top View MSOP-8 SOT23-8 D13N YMLL D13E Pin 1 Identifier Pin 1 Lot Trace Code Bottom View Pin 1 YMLL Model Code (4 Characters Max.) GRS00035 Option 1 Lot Trace Code GRS00035 Option 1 PIN DESCRIPTIONS MSOP-8 SOT23-8 NAME 1 4 VDD Power Supply Input, +2.7V to +5.5V DESCRIPTION 2 3 VREF Reference Voltage Input 3 2 VFB Feedback connection for the output amplifier.
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ELECTRICAL CHARACTERISTICS VDD = +2.7V to +5.5V, RL = 2kΩ to GND, and CL = 200pF to GND, unless otherwise noted.
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TIMING CHARACTERISTICS(1, 2) VDD = +2.7V to +5.5V, all specifications –40°C to +105°C, unless otherwise noted. DAC7513E, N PARAMETER t1(3) t2 t3 t4 t5 t6 t7 t8 DESCRIPTION CONDITIONS MIN TYP MAX UNITS VDD = 2.7V to 3.6V VDD = 3.6V to 5.5V 50 33 ns ns VDD = 2.7V to 3.6V VDD = 3.6V to 5.5V 13 13 ns ns VDD = 2.7V to 3.6V VDD = 3.6V to 5.5V 22.5 13 ns ns VDD = 2.7V to 3.6V VDD = 3.6V to 5.5V 0 0 ns ns VDD = 2.7V to 3.6V VDD = 3.6V to 5.5V 5 5 ns ns VDD = 2.7V to 3.6V VDD = 3.
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TYPICAL CHARACTERISTICS: VDD = +5V At TA = +25°C and +VDD = +5V, unless otherwise noted. LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE (+25°C) LE (LSB) 16.0 12.0 8.0 4.0 0.0 –4.0 –8.0 –12.0 –16.0 16.0 12.0 8.0 4.0 0.0 –4.0 –8.0 –12.0 –16.0 1.0 1.0 0.5 0.5 DLE (LSB) DLE (LSB) LE (LSB) LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE (–40°C) 0.0 –0.5 –1.0 0.0 –0.5 –1.
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TYPICAL CHARACTERISTICS: VDD = +5V (Cont.) At TA = +25°C and +VDD = +5V, unless otherwise noted. NOTE: All references to IDD include IREF current. SOURCE AND SINK CURRENT CAPABILITY IDD HISTOGRAM 3000 5 VREF tied to VDD.
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TYPICAL CHARACTERISTICS: VDD = +5V (Cont.) At TA = +25°C and +VDD = +5V, unless otherwise noted. NOTE: All references to IDD include IREF current.
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TYPICAL CHARACTERISTICS: VDD = +5V (Cont.) At TA = +25°C and +VDD = +5V, unless otherwise noted. EXITING POWER-DOWN (800H Loaded) CODE CHANGE GLITCH Loaded with 2kΩ and 200pF to GND. Code Change: 800H to 7FFH. VOUT (20mV/div) CLK (5V/div) VOUT (1V/div) Time (5µs/div) Time (0.5µs/div) TYPICAL CHARACTERISTICS: VDD = +2.7V At TA = +25°C and +VDD = +2.7V, unless otherwise noted. LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE (+25°C) LE (LSB) 16.0 12.0 8.0 4.0 0.0 –4.0 –8.0 –12.0 –16.0 16.
PAGE 10
TYPICAL CHARACTERISTICS: VDD = +2.7V (Cont.) At TA = +25°C and +VDD = +2.7V, unless otherwise noted. NOTE: All references to IDD include IREF current. FULL-SCALE ERROR vs TEMPERATURE 30 20 20 10 10 Error (mV) Error (mV) ZERO-SCALE ERROR vs TEMPERATURE 30 0 0 –10 –10 –20 –20 –30 –40 0 40 80 –30 –40 120 0 40 Temperature (°C) IDD HISTOGRAM 3000 80 120 Temperature (°C) SOURCE AND SINK CURRENT CAPABILITY 3 VDD = +3V VREF tied to VDD.
PAGE 11
TYPICAL CHARACTERISTICS: VDD = +2.7V (Cont.) At TA = +25°C and +VDD = +2.7V, unless otherwise noted. NOTE: All references to IDD include IREF current. SUPPLY CURRENT vs LOGIC INPUT VOLTAGE FULL-SCALE SETTLING TIME 2500 CLK (2.7V/div) IDD (µA) 2000 1500 1000 Full-Scale Code Change 000H to FFFH Output Loaded with 2kΩ and 200pF to GND 500 VOUT (1V/div) 0 0 1 2 3 4 5 Time (1µs/div) VLOGIC (V) HALF-SCALE SETTLING TIME FULL-SCALE SETTLING TIME CLK (2.7V/div) CLK (2.
PAGE 12
TYPICAL CHARACTERISTICS: VDD = +2.7V (Cont.) At TA = +25°C and +VDD = +2.7V, unless otherwise noted. EXITING POWER-DOWN (800H Loaded) CODE CHANGE GLITCH Loaded with 2kΩ and 200pF to GND. Code Change: 800H to 7FFH. VOUT (20mV/div) CLK (2.7V/div) VOUT (1V/div) Time (0.5µs/div) Time (5µs/div) THEORY OF OPERATION DAC SECTION R The architecture consists of a string DAC followed by an output buffer amplifier. Figure 1 shows a block diagram of the DAC architecture.
PAGE 13
The inverting input of the output amplifier is brought out to the VFB pin. This allows for better accuracy in critical applications by tying the VFB point and the amplifier output together directly at the load. Other signal conditioning circuitry can also be connected between these points for specific applications.
PAGE 14
the advantage that the output impedance of the part is known while the part is in power-down mode. There are three different options: the output is connected internally to GND through a 1kΩ resistor; a 100kΩ resistor; or it is left opencircuited (High-Z). The output stage is illustrated in Figure 5. All linear circuitry is shut down when the power-down mode is activated, however, the contents of the DAC register are unaffected when in power-down. The time to exit power-down is typically 2.
PAGE 15
BIPOLAR OPERATION USING THE DAC7513 APPLICATIONS The DAC7513 has been designed for single-supply operation, but a bipolar output range is also possible using the circuit in Figure 10 which will give an output voltage range of ±VREF. Rail-to-rail operation at the amplifier output is achievable using an OPA703 as the output amplifier.
PAGE 16
The power applied to VDD should be well regulated and low noise. Switching power supplies and DC/DC converters will often have high-frequency glitches or spikes riding on the output voltage. In addition, digital components can create similar high-frequency spikes as their internal logic switches states; this noise can easily couple into the DAC output voltage through various paths between the power connections and analog output.
PAGE 17
PACKAGE DRAWINGS DGK (R-PDSO-G8) PLASTIC SMALL-OUTLINE PACKAGE 0,38 0,25 0,65 8 0,08 M 5 0,15 NOM 3,05 2,95 4,98 4,78 Gage Plane 0,25 1 0°– 6° 4 3,05 2,95 0,69 0,41 Seating Plane 1,07 MAX 0,15 0,05 0,10 4073329/C 08/01 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion. Falls within JEDEC MO-187 DAC7513 SBAS157A www.ti.
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PACKAGE DRAWINGS (Cont.) DCN (R-PDSO-G8) PLASTIC SMALL-OUTLINE 0,45 0,28 0,65 1,75 3,00 1,50 2,60 Index Area 1,95 REF 3,00 2,80 1,45 0,90 0°–10° –A– 1,30 0,90 0,15 0,00 0,20 0,09 0,60 0,10 C 4202106/A 03/01 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Foot length measured reference to flat foot surface parallel to Datum A. D. Package outline exclusive of mold flash, metal burr and dambar protrusion/intrusion. E.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.
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PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing DAC7513E/250 VSSOP DGK 8 DAC7513N/250 SOT-23 DCN DAC7513N/3K SOT-23 DCN SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 8 250 180.0 8.4 3.2 3.1 1.39 4.0 8.0 Q3 8 3000 180.0 8.4 3.2 3.1 1.39 4.0 8.
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PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DAC7513E/250 VSSOP DGK 8 250 210.0 185.0 35.0 DAC7513N/250 SOT-23 DCN 8 250 210.0 185.0 35.0 DAC7513N/3K SOT-23 DCN 8 3000 210.0 185.0 35.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.