Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsData collecting ICsData acquisition IC - DA converter (DAC) SSOP 20

12-Bit, Parallel Input

DIGITAL-TO-ANALOG CONVERTER

DESCRIPTION

The DAC7621 is a 12-bit digital-to-analog converter

(DAC) with guaranteed 12-bit monotonicity perfor-

mance over the industrial temperature range. It re-

quires a single +5V supply and contains an input

rail-to-rail output amplifier. For a full-scale step, the

output will settle to 1 LSB within 7µs. The device

consumes 2.5mW (0.5mA at 5V).

The parallel interface is compatible with a wide variety

of microcontrollers. The DAC7621 accepts a 12-bit

parallel word, has a double-buffered input logic struc-

ture and provides data readback. In addition, two

control pins provide a chip select (CS) function and

asynchronous clear (CLR) input. The CLR input can

be used to ensure that the DAC7621 output is 0V on

power-up or as required by the application.

The DAC7621 is available in a 20-lead SSOP package

and is fully specified over the industrial temperature

range of –40°C to +85°C.

FEATURES

● LOW POWER: 2.5mW

● FAST SETTLING: 7µs to 1 LSB

● 1mV LSB WITH 4.095V FULL-SCALE

RANGE

● COMPLETE WITH REFERENCE

● 12-BIT LINEARITY AND MONOTONICITY

OVER INDUSTRIAL TEMP RANGE

● ASYNCHRONOUS RESET TO 0V

APPLICATIONS

● PROCESS CONTROL

● DATA ACQUISITION SYSTEMS

● CLOSED-LOOP SERVO-CONTROL

● PC PERIPHERALS

● PORTABLE INSTRUMENTATION

International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111

Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132

DAC7621

12-Bit DAC

Ref

DAC Register

Input Register

I/O Buffer

CLR

LOADDAC

R/W

OUT

DGND

DAC7621

D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11

DAC7621

For most current data sheet and other product

information, visit www.burr-brown.com

SBAS107

Summary of content (14 pages)

PAGE 1
® DAC DAC7621 ® 762 1 For most current data sheet and other product information, visit www.burr-brown.com 12-Bit, Parallel Input DIGITAL-TO-ANALOG CONVERTER FEATURES DESCRIPTION ● LOW POWER: 2.5mW ● FAST SETTLING: 7µs to 1 LSB The DAC7621 is a 12-bit digital-to-analog converter (DAC) with guaranteed 12-bit monotonicity performance over the industrial temperature range. It requires a single +5V supply and contains an input register, latch, 2.
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SPECIFICATIONS ELECTRICAL At TA = –40°C to +85°C, and VDD = +5V, unless otherwise noted. DAC7621E PARAMETER CONDITIONS RESOLUTION MIN DAC7621EB TYP MAX Guaranteed Monotonic Code 000H Code FFFH ANALOG OUTPUT Output Current Load Regulation Capacitive Load Short-Circuit Current Short-Circuit Duration Code 800H RLOAD ≥ 402Ω, Code 800H No Oscillation –2 –1 –1 4.079 ±1/2 ±1/2 +1 4.
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PIN CONFIGURATION PIN DESCRIPTIONS Top View PIN SSOP LABEL 1 CLR 1 20 LOADDAC VDD 2 19 CS VOUT 3 18 R/W AGND 4 17 DB0 (LSB) DGND 5 DB11 (MSB) DB10 16 DB1 6 15 DB2 7 14 DB3 DAC7621E DB9 8 13 DB4 DB8 9 12 DB5 DB7 10 11 DB6 DESCRIPTION CLR Reset. Resets the DAC register to zero. Active LOW. Asynchronous input.
PAGE 4
TIMING DIAGRAMS tWCS CS tWS tWH R/W tRCS CS tLWD tRDH tRDS LOADDAC R/W tDH tDS tDZ Data Out Data In Data Valid tCSD Data Output Timing Digital Input Timing TIMING SPECIFICATIONS LOGIC TRUTH TABLE TA = –40°C to +85°C SYMBOL DESCRIPTION tRCS CS LOW for Read MIN TYP MAX UNITS 200 ns tRDS R/W HIGH to CS LOW 10 ns tRDH R/W HIGH after CS HIGH 0 ns tDZ CS HIGH to Data Bus in High Impedance 100 tCSD CS LOW to Data Bus Valid tWCS CS LOW for Write 50 100 ns 160 tWS R/W LOW to
PAGE 5
TYPICAL PERFORMANCE CURVES At TA = +25°, and VDD = 5V, unless otherwise specified. PULL-DOWN VOLTAGE vs OUTPUT SINK CURRENT OUTPUT SWING vs LOAD 1k 4.5 4.0 100 Delta VOUT (mV) Output Voltage (V) 3.5 3.0 2.5 2.0 1.5 1.0 85°C (mV) 25°C 10 1 –40°C 0.1 Data = 000H 0.5 0.01 0.001 0 10 100 1k 10k 100k 0.01 0.1 1 10 100 Current (mA) Load Resistance (Ω) SUPPLY CURRENT vs LOGIC INPUT VOLTAGE BROADBAND NOISE 4.0 Supply Current (mA) Noise Voltage (1mV/div) 3.5 Code = FFFH BW = 2MHz 3.
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TYPICAL PERFORMANCE CURVES (CONT) At TA = +25°, and VDD = 5V, unless otherwise specified. SUPPLY CURRENT vs TEMPERATURE SHORT-CIRCUIT CURRENT vs OUTPUT VOLTAGE 4.0 80 Positive Current Limit Supply Current (mA) 40 VLOGIC = 3.5V Data = FFFH No Load 3.5 Data = 800H Output tied to ISOURCE 20 0 –20 –40 Negative Current Limit –60 3.0 2.5 2.0 VDD = 5.0V VDD = 5.25V 1.5 1.0 0.5 VDD = 4.75V 0 –80 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 –40 –30 –20 –10 5.
PAGE 7
TYPICAL PERFORMANCE CURVES (CONT) At TA = +25°, and VDD = 5V, unless otherwise specified. OUTPUT VOLTAGE NOISE vs FREQUENCY FALL TIME DETAIL 10.000 Noise (µV/√Hz) Output Voltage (1mV/div) Data = FFFH VOUT LD 1.000 0.100 0.010 10 Time (10µs/div) 100 1k 10k 100k Frequency (Hz) LONG-TERM DRIFT ACCELERATED BY BURN-IN TOTAL UNADJUSTED ERROR HISTOGRAM 60 144 Units 6 T.U.
PAGE 8
TYPICAL PERFORMANCE CURVES (CONT) At TA = +25°, and VDD = 5V, unless otherwise specified. DIFFERENTIAL LINEARITY ERROR vs DIGITAL CODE (at +25°C) LINEARITY ERROR vs DIGITAL CODE (at +25°C) 2.0 Differential Linearity Error (LSBs) 2.0 Linearity Error (LSBs) 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 0 512 1024 1536 2048 2560 3072 3584 0.5 0 –0.5 –1.0 –1.
PAGE 9
OPERATION The digital data into the DAC7621 is double-buffered. This means that new data can be entered into the DAC without disturbing the old data and the analog output of the converter. At some point after the data has been entered into the serial shift register, this data can be transferred into the DAC register. This transfer is accomplished with a HIGH to LOW transition of the LOADDAC pin. However, the LOADDAC pin makes the DAC register transparent.
PAGE 10
R-2R DAC 2R Output Amplifier R Buffer 2R R2 2.435V Bandgap Reference R 2R R1 R 2R 2R FIGURE 2. Simplified Schematic of Analog Portion. OUTPUT AMPLIFIER A precision, low-power amplifier buffers the output of the DAC section and provides additional gain to achieve a 0V to 4.095V range. The amplifier has low offset voltage, low noise, and a set gain of 1.682V/V (4.095/2.435). See Figure 2 for an equivalent circuit schematic of the analog portion of the DAC7621.
PAGE 11
APPLICATIONS signals and should cross them at right angles. A solid analog ground plane around the D/A package, as well as under it in the vicinity of the analog and power supply pins, will isolate the D/A from switching currents. It is recommended that DGND and AGND be connected directly to the ground planes under the package. POWER AND GROUNDING The DAC7621 can be used in a wide variety of situations— from low power, battery operated systems to large-scale industrial process control systems.
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PACKAGE OPTION ADDENDUM www.ti.
PAGE 13
PACKAGE OPTION ADDENDUM www.ti.com (4) 9-Nov-2013 There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device.
PAGE 14
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.