DAC7634 SBAS134B – JULY 2004 – REVISED DECEMBER 2005 16-BIT, QUAD VOLTAGE OUTPUT DIGITAL-TO-ANALOG CONVERTER FEATURES • • • • • • DESCRIPTION Low Power: 10 mW Unipolar or Bipolar Operation Settling Time: 10 µs to 0.
DAC7634 www.ti.com SBAS134B – JULY 2004 – REVISED DECEMBER 2005 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
DAC7634 www.ti.com SBAS134B – JULY 2004 – REVISED DECEMBER 2005 SPECIFICATIONS (continued) At TA = TMIN to TMAX, VDD = VCC = 5 V, VSS = –5 V, VREFH = 2.5 V, and VREFL = –2.5 V, unless otherwise noted PARAMETER TEST CONDITIONS DAC7634E MIN TYP DAC7634EB MAX MIN TYP MAX VREFL VREFH VREFL VREFH – 1.25 1.25 1.25 1.25 UNIT ANALOG INPUT Voltage output Output current VREF = –2.
DAC7634 www.ti.com SBAS134B – JULY 2004 – REVISED DECEMBER 2005 SPECIFICATIONS At TA = TMIN to TMAX, VDD = VCC = 5 V, VSS = 0 V, VREFH = 2.
DAC7634 www.ti.
DAC7634 www.ti.
DAC7634 www.ti.com SBAS134B – JULY 2004 – REVISED DECEMBER 2005 TYPICAL PERFORMANCE CURVES: VSS = 0 V At TA = 25°C, VDD = VCC = 5 V, VREFH = 2.5 V, VREFL = 0 V, representative unit, unless otherwise specified. LE (LSB) 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE (DAC B, 25°C) 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.
DAC7634 www.ti.com SBAS134B – JULY 2004 – REVISED DECEMBER 2005 TYPICAL PERFORMANCE CURVES: VSS = 0 V (continued) At TA = 25°C, VDD = VCC = 5 V, VREFH = 2.5 V, VREFL = 0 V, representative unit, unless otherwise specified. LE (LSB) 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 LINEARY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE (DAC B, 85°C) 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.
DAC7634 www.ti.com SBAS134B – JULY 2004 – REVISED DECEMBER 2005 TYPICAL PERFORMANCE CURVES: VSS = 0 V (continued) At TA = 25°C, VDD = VCC = 5 V, VREFH = 2.5 V, VREFL = 0 V, representative unit, unless otherwise specified. LINEARY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE (DAC B, –40°C) LE (LSB) 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.
DAC7634 www.ti.com SBAS134B – JULY 2004 – REVISED DECEMBER 2005 TYPICAL PERFORMANCE CURVES: VSS = 0 V (continued) At TA = 25°C, VDD = VCC = 5 V, VREFH = 2.5 V, VREFL = 0 V, representative unit, unless otherwise specified. VREFL CURRENT vs CODE (ALL DACs SENT TO INDICATED CODE) 0.30 0.00 0.25 –0.05 VREF Current (mA) VREF Current (mA) VREFH CURRENT vs CODE (ALL DACs SENT TO INDICATED CODE) 0.20 0.15 0.10 –0.10 –0.15 –0.20 –0.25 0.05 –0.30 0.
DAC7634 www.ti.com SBAS134B – JULY 2004 – REVISED DECEMBER 2005 TYPICAL PERFORMANCE CURVES: VSS = 0 V (continued) At TA = 25°C, VDD = VCC = 5 V, VREFH = 2.5 V, VREFL = 0 V, representative unit, unless otherwise specified. OUTPUT VOLTAGE vs MIDSCALE GLITCH PERFORMANCE OUTPUT VOLTAGE vs MIDSCALE GLITCH PERFORMANCE +5V LDAC 0 Output Voltage (50mV/div) Output Voltage (50mV/div) +5V LDAC 0 7FFFH to 8000 H 8000H to 7FFFH Time (1 µs/div) Time (1 µs/div) Figure 21. Figure 22.
DAC7634 www.ti.com SBAS134B – JULY 2004 – REVISED DECEMBER 2005 TYPICAL PERFORMANCE CURVES: VSS = –5 V At TA = 25°C, VDD = VCC = 5 V, VREFH = 2.5 V, VREFL = 0 V, representative unit, unless otherwise specified. LE (LSB) 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE (DAC B, 25°C) 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.
DAC7634 www.ti.com SBAS134B – JULY 2004 – REVISED DECEMBER 2005 TYPICAL PERFORMANCE CURVES: VSS = –5 V (continued) At TA = 25°C, VDD = VCC = 5 V, VREFH = 2.5 V, VREFL = 0 V, representative unit, unless otherwise specified. LE (LSB) 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE (DAC B, 85°C) 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.
DAC7634 www.ti.com SBAS134B – JULY 2004 – REVISED DECEMBER 2005 TYPICAL PERFORMANCE CURVES: VSS = –5 V (continued) At TA = 25°C, VDD = VCC = 5 V, VREFH = 2.5 V, VREFL = 0 V, representative unit, unless otherwise specified. LE (LSB) 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE (DAC B, –40°C) DLE (LSB) LE (LSB) 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.
DAC7634 www.ti.com SBAS134B – JULY 2004 – REVISED DECEMBER 2005 TYPICAL PERFORMANCE CURVES: VSS = –5 V (continued) At TA = 25°C, VDD = VCC = 5 V, VREFH = 2.5 V, VREFL = 0 V, representative unit, unless otherwise specified. VREFl CURRENT vs CODE (ALL DACs SENT TO INDICATED CODE) +0.6 0.0 +0.5 –0.1 VREF Current (mA) VREF Current (mA) VREFH CURRENT vs CODE (ALL DACs SENT TO INDICATED CODE) +0.4 +0.3 +0.2 +0.1 –0.2 –0.3 –0.4 –0.5 –0.6 0.
DAC7634 www.ti.com SBAS134B – JULY 2004 – REVISED DECEMBER 2005 TYPICAL PERFORMANCE CURVES: VSS = –5 V (continued) At TA = 25°C, VDD = VCC = 5 V, VREFH = 2.5 V, VREFL = 0 V, representative unit, unless otherwise specified. VOUT vs RLOAD POSITIVE SUPPLY CURRENT vs DIGITAL INPUT CODE 2 No Load Source ICC (mA) VOUT (V) 1.5 All DACs One DAC 1 Sink –2 0.5 –3 –4 –5 0.001 0 0.01 0.1 1 10 100 1000 0000H 2000H 4000H RLOAD (kΩ) 8000H A000H C000H E000H FFFFH Digital Input Code Figure 44.
DAC7634 www.ti.com SBAS134B – JULY 2004 – REVISED DECEMBER 2005 RF VOUT Sense VOUT R 2R 2R 2R 2R 2R 2R 2R 2R 2R VREFH VREFH Sense VREFL VREFL Sense Figure 48.
DAC7634 www.ti.com SBAS134B – JULY 2004 – REVISED DECEMBER 2005 Serial Data In Clock Load DAC Registers Load Chips Select Serial Data Out +5V Reset DAC Registers 1 µF +5V 0.1 µF 1 NC VOUTA Sense 48 2 NC VOUTA 47 3 SDI AGND 46 4 DGND 5 CLK 6 –2.5V to +2.5V –5V VSS 45 VREFL AB Sense 44 DGND VREFL AB 43 –2.5V 7 LDAC VREFH AB 42 +2.
DAC7634 www.ti.com SBAS134B – JULY 2004 – REVISED DECEMBER 2005 RW1 VOUTA Sense 48 VOUTA 47 AGND 46 VSS 45 VREFL AB Sense 44 VREFL AB 43 VREFH AB 42 VREFH AB Sense 41 VOUTB Sense 40 VOUTB 39 DAC7634 RW2 VOUT +V +2.5V RW1 RW2 VOUT Figure 51. Analog Output Closed-Loop Configuration(1/2 DAC7634) (RW Represents Wiring Resistances) REFERENCE INPUTS The reference inputs, VREFL and VREFH, can be any voltage between VSS + 2.5 V and VCC – 2.5 V, provided that VREFH is at least 1.
DAC7634 www.ti.com SBAS134B – JULY 2004 – REVISED DECEMBER 2005 +V VOUTA Sense 48 VOUTA 47 AGND 46 VSS 45 VREFL AB Sense 44 VREFL AB 43 VREFH AB 42 VREFH AB Sense 41 VOUTB Sense 40 VOUTB 39 DAC7634 OPA2350 VOUT 2kΩ 2200pF 100Ω +0.050V +V 98kΩ 1000pF +2.5V 100Ω 1000pF 2200pF VOUT NOTE: V REFL has been chosen to be 50 mV to allow for current sinking voltage drops across the 100-Ω resistor and the output stage of the buffer operational amplifier.
DAC7634 www.ti.com SBAS134B – JULY 2004 – REVISED DECEMBER 2005 VOUTA Sense 48 VOUTA 47 AGND 46 VSS 45 VREFL AB Sense 44 VREFL AB 43 VREFH AB 42 VREFH AB Sense 41 VOUTB Sense 40 VOUTB 39 DAC7634 VOUT +V +V OPA2350 +2.5V 100Ω 1000pF 2200pF VOUT LE (LSB) 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 DLE (LSB) LE (LSB) 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 DLE (LSB) Figure 57. Single-Supply Buffered VREFH (1/2 DAC7634) 0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFF H 2.0 1.
DAC7634 www.ti.com SBAS134B – JULY 2004 – REVISED DECEMBER 2005 DIGITAL INTERFACE The DAC code, quick load control, and address are provided via a 24-bit serial interface (see Figure 15). The first two bits select the input register that is updated when LOAD goes LOW. The third bit is a Quick Load bit such that if HIGH, the code in the shift register is loaded into ALL DAC's input register when LOAD signal goes LOW.
DAC7634 www.ti.com SBAS134B – JULY 2004 – REVISED DECEMBER 2005 SERIAL-DATA OUTPUT Table 2. Serial Shift Register Truth Table CLK (1) LOAD RST SERIAL SHIFT REGISTER H (2) X (3) H H No Change L (4) L H H No Change L ↑ (5) H H Advanced One Bit ↑ L H H Advanced One Bit H (6) X L (7) H No Change H ↑ (8) No Change CS (1) H (6) (1) (2) (3) (4) (5) (6) (7) (8) X CS and CLK are interchangeable.
DAC7634 www.ti.com SBAS134B – JULY 2004 – REVISED DECEMBER 2005 DAC7634 SCK CLK DIN SDI CS CS DAC7634 DAC7634 CLK SDO SDI CLK SDO SDO SDI CS To Other Serial Devices CS Figure 61. Daisy-Chaining DAC7634 (LSB) (MSB) SDI A1 A0 QUICK LOAD X X X XX D15 D1 D0 CLK tcss t CSH tLD1 tLD2 CS tLDDD LOAD tLDRW LDAC Figure 62. Serial Interface Timing tDS t DH SDI t CL tCH CLK Figure 63.
DAC7634 www.ti.com SBAS134B – JULY 2004 – REVISED DECEMBER 2005 Table 3.
DAC7634 www.ti.com SBAS134B – JULY 2004 – REVISED DECEMBER 2005 I OUT VPROGRAMMED 125Ω VOUTA Sense 48 VOUTA 47 AGND 46 VSS 45 VREFL AB Sense 44 VREFL AB 43 VREFH AB 42 VREFH AB Sense 41 VOUTB Sense 40 VOUTB 39 DAC7634 +V OPA2350 2200pF 100Ω 20kΩ +V 80kΩ 1000pF +2.5V 100Ω 1000pF 2200pF IOUT VPROGRAMMED 125Ω GND Figure 65.
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PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel Diameter Width (mm) W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant DAC7634E/1K SSOP DL 48 1000 330.0 32.4 11.35 16.2 3.1 16.0 32.0 Q1 DAC7634EB/1K SSOP DL 48 1000 330.0 32.4 11.35 16.2 3.1 16.0 32.
PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DAC7634E/1K SSOP DL 48 1000 346.0 346.0 49.0 DAC7634EB/1K SSOP DL 48 1000 346.0 346.0 49.
MECHANICAL DATA MSSO001C – JANUARY 1995 – REVISED DECEMBER 2001 DL (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 48 PINS SHOWN 0.025 (0,635) 0.0135 (0,343) 0.008 (0,203) 48 0.005 (0,13) M 25 0.010 (0,25) 0.005 (0,13) 0.299 (7,59) 0.291 (7,39) 0.420 (10,67) 0.395 (10,03) Gage Plane 0.010 (0,25) 1 0°–ā8° 24 0.040 (1,02) A 0.020 (0,51) Seating Plane 0.110 (2,79) MAX 0.004 (0,10) 0.008 (0,20) MIN PINS ** 28 48 56 A MAX 0.380 (9,65) 0.630 (16,00) 0.730 (18,54) A MIN 0.370 (9,40) 0.
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