DAC DAC 764 764 2 DAC7642 DAC7643 3 SBAS233 – DECEMBER 2001 16-Bit, Dual Voltage Output DIGITAL-TO-ANALOG CONVERTER FEATURES DESCRIPTION ● ● ● ● The DAC7642 and DAC7643 are dual channel, 16-bit, voltage output Digital-to-Analog Converters (DACs) which provide 15-bit monotonic performance over the specified temperature range.
ELECTROSTATIC DISCHARGE SENSITIVITY ABSOLUTE MAXIMUM RATINGS(1) VCC to VSS ............................................................................. –0.3V to 11V VCC to GND .......................................................................... –0.3V to 5.5V VREFL to VSS ............................................................. –0.3V to (VCC – VSS) VCC to VREFH ............................................................ –0.3V to (VCC – VSS) VREFH to VREFL .......................................
ELECTRICAL CHARACTERISTICS (Dual Supply) At TA = TMIN to TMAX, VCC = +5V, VSS = –5V, VREFH = +2.5V, and VREFL = –2.5V, unless otherwise noted.
ELECTRICAL CHARACTERISTICS (Single Supply) At TA = TMIN to TMAX, VCC = +5V, VSS = 0V, VREFH = +2.5V, and VREFL = 0V, unless otherwise noted.
PIN CONFIGURATION 25 VOUTB 26 VOUTB Sense 27 VREFH Sense 28 VREFH 29 VREFL 30 VREFL Sense 31 VOUTA Sense LQFP 32 VOUTA Top View VCC 1 24 VSS GND 2 23 DACSEL DB15 3 22 RST DB14 4 21 LOADDACS DB13 5 20 R/W DB12 6 19 CS DB11 7 18 DB0 DB10 8 17 DB1 16 DB2 13 DB5 15 12 DB6 DB3 11 DB7 14 10 DB8 DB4 9 DB9 DAC7642 DAC7643 PIN DESCRIPTIONS PIN NAME DESCRIPTION PIN NAME 1 VCC Positive Power Supply 20 R/W 2 GND Ground Enabled by CS, Controls Data Read
TYPICAL CHARACTERISTICS: VSS = 0V At TA = +25°C, VCC = +5V, VSS = 0V, VREFH = +2.5V, VREFL = 0V, representative unit, unless otherwise specified. 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH LE (LSB) Digital Input Code LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE (DAC A, +85°C) LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE (DAC B, +85°C) 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.
TYPICAL CHARACTERISTICS: VSS = 0V (Cont.) At TA = +25°C, VCC = +5V, VSS = 0V, VREFH = +2.5V, VREFL = 0V, representative unit, unless otherwise specified.
TYPICAL CHARACTERISTICS: VSS = 0V (Cont.) At TA = +25°C, VCC = +5V, VSS = 0V, VREFH = +2.5V, VREFL = 0V, representative unit, unless otherwise specified. OUTPUT VOLTAGE vs SETTLING TIME (0V to +2.5V) Large-Signal Settling Time: 1V/div OUTPUT VOLTAGE vs SETTLING TIME (+2.
TYPICAL CHARACTERISTICS: VSS = 0V (Cont.) At TA = +25°C, VCC = +5V, VSS = 0V, VREFH = +2.5V, VREFL = 0V, representative unit, unless otherwise specified. LOGIC SUPPLY CURRENT vs LOGIC INPUT LEVEL FOR DIGITAL INPUTS VOUT vs RLOAD 5 Typical of One Digital Input 0.40 4 0.30 3 VOUT (V) Logic Supply Current (mA) 0.50 0.20 Source 2 0.10 1 0.00 0 0.01 1 0 2 3 4 5 Sink 0.
TYPICAL CHARACTERISTICS: VSS = –5V (Cont.) At TA = +25°C, VCC = +5V, VSS = –5V, VREFH = +2.5V, VREFL = –2.5V, representative unit, unless otherwise specified. LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE (DAC A, –40°C) LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE (DAC B, –40°C) 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH DLE (LSB) LE (LSB) 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 –2.5 –3.0 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 –2.5 –3.0 2.0 1.5 1.
TYPICAL CHARACTERISTICS: VSS = –5V (Cont.) At TA = +25°C, VCC = +5V, VSS = –5V, VREFH = +2.5V, VREFL = –2.5V, representative unit, unless otherwise specified. NEGATIVE FULL-SCALE ERROR vs TEMPERATURE SUPPLY CURRENT vs DIGITAL INPUT CODE 1.00 Code (0000H) No Load ICC 0.75 2 DAC A Supply Current (mA) Negative Full-Scale Error (mV) 3 1 0 DAC B –1 –2 0.50 0.25 0.00 –0.25 –0.50 –0.75 ISS –1.
TYPICAL CHARACTERISTICS: VSS = –5V (Cont.) At TA = +25°C, VCC = +5V, VSS = –5V, VREFH = +2.5V, VREFL = –2.5V, representative unit, unless otherwise specified. OUTPUT VOLTAGE vs MIDSCALE GLITCH PERFORMANCE Output Voltage (50mV/div) Output Voltage (50mV/div) OUTPUT VOLTAGE vs MIDSCALE GLITCH PERFORMANCE 7FFFH to 8000H 8000H to 7FFFH +5V LDAC 0 +5V LDAC 0 Time (1µs/div) Time (1µs/div) THEORY OF OPERATION by the external voltage references VREFL and VREFH, respectively.
0V to +2.5V 32 +2.5V 31 VOUTA 1 +5V 1µF 0.1µF 2 3 4 5 DATA BUS 6 7 8 30 29 28 0V to +2.5V 27 VREFH VREFL Sense VOUTA Sense 26 25 VOUTB Sense VREFH Sense VREFL VOUTB VSS VCC GND DACSEL DB15 RST DAC7642 DAC7643 DB14 LDAC DB13 R/W DB12 CS DB11 DB0 DB10 DB1 24 23 SELECT DAC CHANNEL 22 RESET DAC REGISTERS 21 LOAD DAC REGISTERS 20 READ/WRITE 19 CHIP SELECT 18 17 DATA BUS DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 9 10 11 12 13 14 15 16 FIGURE 2.
ANALOG OUTPUTS When VSS = –5V (dual-supply operation), the output amplifier can swing to within 2.25V of the supply rails over the –40°C to +85°C temperature range. When VSS = 0V (single-supply operation), and with RLOAD also connected to ground, the output can swing to ground. Care must also be taken when measuring the zero-scale error when VSS = 0V. Since the DAC output cannot swing below ground, the output voltage may not change for the first few digital input codes (0000H, 0001H, 0002H, etc.
+V DAC7642 DAC7643 VOUTA 32 VOUTA Sense 31 VREFL Sense 30 VREFL 29 VREFH 28 OPA2350 VOUT 100Ω 27 VOUTB Sense 26 VOUTB 25 2kΩ 1000pF +0.050V 98kΩ +V 100Ω 1000pF VREFH Sense 2200pF +2.5V 2200pF VOUT FIGURE 6. Single-Supply Buffered Reference with VREFL of 50mV. LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE (DAC A, +25°C) LE (LSB) 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.
VOUTA 32 VOUTA Sense 31 VREFL Sense 30 VREFL 29 VREFH 28 VREFH Sense 27 VOUTB Sense 26 VOUTB 25 DAC7642 DAC7643 VOUT +V OPA2350 +V 100Ω 1000pF +2.5V 2200pF VOUT FIGURE 10. Single-Supply Buffered VREFH. LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE (DAC A, +25°C) LE (LSB) 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.
DACSEL R/W CS RST LOADDACS INPUT REGISTER DAC REGISTER MODE DAC L H L H X X X L L H H X X X L L L L H H X L, H L, H L, H L, H L, H L, H ↑ X X X X ↑ L, H L, H Write Write Read Read Hold Hold Reset Hold Hold Hold Hold Write Hold Reset Write Input Write Input Read Input Read Input Update Hold Reset A B A B All All All TABLE I. DAC7642 and DAC7643 Logic Truth Table.
SYMBOL DESCRIPTION MIN tRCS tRDS tRDH tDZ tCSD tWCS tWS tWH tAS tAH tLS tLH tLX tDS tDH tLWD tRSS tRSH tS CS LOW for Read R/W HIGH to CS LOW R/W HIGH after CS HIGH CS HIGH to Data Bus in High Impedance CS LOW to Data Bus Valid CS LOW for Write R/W LOW to CS LOW R/W LOW after CS HIGH DACSEL Valid to CS LOW DACSEL Valid after CS HIGH CS LOW to LOADDACS HIGH CS LOW after LOADDACS HIGH LOADDACS HIGH Data Valid to CS LOW Data Valid after CS HIGH LOADDACS LOW RESET LOW RESET HIGH Settling Time 150 10 10 10
PACKAGE DRAWING MTQF002B – JANUARY 1995 – REVISED MAY 2000 VF (S-PQFP-G32) PLASTIC QUAD FLATPACK 0,45 0,25 0,80 24 0,20 M 17 25 16 32 9 0,13 NOM 1 8 5,60 TYP 7,20 SQ 6,80 9,20 SQ 8,80 Gage Plane 0,05 MIN 0,25 0°– 7° 1,45 1,35 Seating Plane 0,75 0,45 0,10 1,60 MAX 4040172/D 04/00 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. DAC7642, DAC7643 SBAS233 www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant DAC7642VFBT LQFP VF 32 250 330.0 16.4 9.6 9.6 1.9 12.0 16.0 Q2 DAC7642VFT LQFP VF 32 250 330.0 16.4 9.6 9.6 1.9 12.0 16.
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DAC7642VFBT LQFP VF 32 250 367.0 367.0 38.0 DAC7642VFT LQFP VF 32 250 367.0 367.0 38.
MECHANICAL DATA MTQF002B – JANUARY 1995 – REVISED MAY 2000 VF (S-PQFP-G32) PLASTIC QUAD FLATPACK 0,45 0,25 0,80 24 0,20 M 17 25 16 32 9 0,13 NOM 1 8 5,60 TYP 7,20 SQ 6,80 9,20 SQ 8,80 Gage Plane 0,05 MIN 0,25 0°– 7° 1,45 1,35 Seating Plane 0,75 0,45 0,10 1,60 MAX 4040172/D 04/00 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice.
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