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Positive Voltage Output Circuit
GND
-2.5V
+2.5VReference
OPA277
0 V<
OUT
+2.5V<
V
OUT
V
REF
V
DD
V
IN
OPA277
GND
I 1
OUT
R
FB
V
DD
V
OUT
I 2
OUT
C
1
DAC7822
Bipolar Output Section
V
OUT
+
ǒ
D
0.5 2
N
*1
Ǔ
V
REF
(2)
DAC7822
SBAS374A – JUNE 2006 – REVISED JULY 2007
Table 2. Suitable High Speed Operational Amplifiers from Texas Instruments (Multiple Channel Options)
SUPPLY GBW VOLTAGE GBW SLEW V
OS
V
OS
CMRR
VOLTAGE PRODUCT NOISE (typ) RATE (typ) (max) (min) PACKAGE/
PRODUCT (V) (MHz) nV/ √ Hz (MHz) (V/ μ s) ( μ V) ( μ V) (dB) LEAD DESCRIPTION
Single Channel
Very Low-Power High Speed
SOT5-23,
Rail-To-Rail Input/Output
THS4281 ± 2.7 to ± 15 38 12.5 35 500 3500 500 1000 MSOP-8,
Voltage Feedback
SOIC-8
Operational Amplifier
CDIP-8,
100-MHz Low Noise
THS4031 ± 4.5 to ± 16.5 200 1.6 100 500 3000 3000 8000 MSOP-8,
Voltage-Feedback Amplifier
SOIC-8
SOIC-8, High Speed FET-Input
THS4631 ± 4.5 to ± 16.5 210 7 900 260 2000 50pA 2
MSOP-8 Operational Amplifier
Wideband, Unity Gain Stable
SOIC-8,
OPA656 ± 4 to ± 6 230 7 290 250 2600 2pA 5pA FET-Input Operational
SOT5-23
Amplifier
Unity Gain Stable, Low
SOIC-8,
OPA820 ± 2.5 to ± 6 280 2.5 240 200 1200 900 23,000 Noise, Voltage Feedback
SOT5-23
Operational Amplifier
Dual Channel
100-MHz Low Noise
SOIC-8,
THS4032 ± 4.5 to ± 16.5 200 1.6 100 500 3000 3000 8000 Voltage-Feedback Amplifier,
MSOP-8
Dual
SpeedPlus Dual Wideband,
SOIC-8,
OPA2822 ± 2 to ± 6.3 220 2 170 200 1200 9600 12000 Low-Noise Operational
MSOP-8
Amplifier
As Figure 40 illustrates, in order to generate a positive voltage output, a negative reference is input to the
DAC7822. This design is suggested instead of using an inverting amp to invert the output as a result of resistor
tolerance errors. For a negative reference, V
OUT
and GND of the reference are level-shifted to a virtual ground
and a –2.5V input to the DAC7822 with an op amp.
Figure 40. Positive Voltage Output Circuit
The DAC7822, as a 2-quadrant multiplying DAC, can be used to generate a unipolar output. The polarity of the
full-scale output I
OUT
is the inverse of the input reference voltage at V
REF
.
Some applications require full 4-quadrant multiplying capabilities or bipolar output swing. As shown in Figure 41 ,
external op amp U2 is added as a summing amp and has a gain of 2X that widens the output span to 5V. A
4-quadrant multiplying circuit is implemented by using a 2.5V offset of the reference voltage to bias U2.
According to the circuit transfer equation given in Equation 2 , input data (D) from code 0 to full-scale produce
output voltages of V
OUT
= –2.5V to V
OUT
= +2.5V.
15
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