Datasheet

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DAC7822
I 1A
OUT
C
1
(2)
V = V to+V-
OUT IN IN
AGND
I 2A
OUT
R
1
2R
R
FB
2R
R A
FB
V
DD
V
IN
R
2
2R
R A
2
R A
2_3
R A
3
R
3
2R
V A
REF
R A
1
AGND
GND
U2
AGND
U1
NOTES:(1)SimilarconfigurationforDACB.
(2)C phasecompensation(1pFto5pF)maybe
1
requiredifU2isahigh-speedamplifier.
(1)
Parallel Interface
Cross-Reference
DAC7822
SBAS374A – JUNE 2006 – REVISED JULY 2007
External resistance mismatching is the significant error in Figure 41 .
Figure 41. Bipolar Output Circuit
Data are loaded to the DAC7822 as a 12-bit parallel word. The bi-directional bus is controlled with CS and R/ W,
allowing data to be written to or read from the DAC register. To write to the device, CS and R/ W are brought
low, and data available on the data lines fills the input register. The rising edge of CS latches the data and
transfers the latched data-word to the DAC register. The DAC latches are not transparent; therefore, a write
sequence must consist of a falling and rising edge on CS in order to ensure that data are loaded to the DAC
register and its analog equivalent is reflected on the DAC output.
To read data stored in the device, R/ W is held high and CS is brought low. Data are loaded from the DAC
register back to the input register and out onto the data line, where it can be read back to the controller.
The DAC7822 has an industry-standard pinout. Table 3 provides the cross-reference information.
Table 3. Cross-Reference
SPECIFIED
TEMPERATURE PACKAGE PACKAGE CROSS-
PRODUCT INL (LSB) DNL (LSB) RANGE DESCRIPTION OPTION REFERENCE PART
DAC7822 ± 1 ± 1 –40 ° C to +125 ° C 40-Lead QFN QFN-40 AD5405
16
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