Datasheet

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t
1
R/W
t
2
t
8
CS
DACA/DACB
t
3
t
t
4
t
6
t
7
t
13
t
12
t
10
t
11
t
5
t
2
DATA
9
DATAVALID DATAVALID
TIMING REQUIREMENTS: 2.5V to 5.5V
DAC7822
SBAS374A JUNE 2006 REVISED JULY 2007
TIMING INFORMATION
At t
r
= t
f
= 1ns (10% to 90% of V
DD
) and timed from a voltage level of (V
IL
+ V
IH
)/2; V
DD
= 2.5V to 5.5V, V
REF
= 10V,
I
OUT
2 = 0V. All specifications –40 ° C to +125 ° C, unless otherwise noted.
DAC7822
PARAMETER
(1)
TEST CONDITIONS MIN TYP MAX UNIT
t
1
R/ W to CS setup time 0 ns
t
2
R/ W to CS hold time 0 ns
t
3
CS low time (write cycle) 10 ns
t
4
Address setup time 10 ns
t
5
Address hold time 0 ns
t
6
Data setup time 6 ns
t
7
Data hold time 0 ns
t
8
R/ W high to CS low 5 ns
t
9
CS minimum high time 7 ns
t
10
Address setup time (Read Cycle) 0 ns
t
11
Address hold time (Read Cycle) 0 ns
t
12
Data access time 5 35 ns
t
13
Bus relinquish time 5 10 ns
(1) Ensured by design; not production tested.
4
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