Datasheet

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DAC8560

DACRegister

16-BitDAC

Ref(+)

2.5V

Reference

OUT

REF

ShiftRegister

GND

SYNC

SCLK

PWD

Control

Resistor

Network

DAC8560

www.ti.com

SLAS464B –DECEMBER 2006– REVISED NOVEMBER 2011

16-Bit, Ultra-Low Glitch, Voltage Output Digital-to-Analog Converter

with 2.5V, 2ppm/°C Internal Reference

Check for Samples: DAC8560

FEATURES

DESCRIPTION

The DAC8560 is a low-power, voltage output, 16-bit

234

• Relative Accuracy: 4LSB

digital-to-analog converter (DAC). The DAC8560

• Glitch Energy: 0.15nV-s

includes a 2.5V, 2ppm/°C internal reference (enabled

• MicroPower Operation: 510μA at 2.7V

by default), giving a full-scale output voltage range of

2.5V. The internal reference has an initial accuracy of

• Internal Reference:

0.02% and can source up to 20mA at the V

REF

pin.

– 2.5V Reference Voltage (enabled by default)

The device is monotonic, provides very good linearity,

– 0.02% Initial Accuracy

and minimizes undesired code-to-code transient

voltages (glitch). The DAC8560 uses a versatile

– 2ppm/°C Temperature Drift (typ)

3-wire serial interface that operates at clock rates up

– 5ppm/°C Temperature Drift (max)

to 30MHz. It is compatible with standard SPI™,

– 20mA Sink/Source Capability

QSPI™, Microwire™, and digital signal processor

(DSP) interfaces.

• Power-On Reset to Zero

• Power Supply: +2.7V to +5.5V

The DAC8560 incorporates a power-on-reset circuit

that ensures the DAC output powers up at zero-scale

• 16-Bit Monotonic Over Temperature Range

and remains there until a valid code is written to the

• Settling Time: 10μs to ±0.003% FSR

device. The DAC8560 contains a power-down

• Low-Power Serial Interface with

feature, accessed over the serial interface, that

Schmitt-Triggered Inputs

reduces the current consumption of the device to

1.2μA at 5V.

• On-Chip Output Buffer Amplifier with

Rail-to-Rail Operation

The low-power consumption, internal reference, and

• Power-Down Capability

small footprint make this device ideal for portable,

battery-operated equipment. The power consumption

• Drop-In Compatible With DAC8531 /01 and

is 2.6mW at 5V, reducing to 6μW in power-down

DAC8550 /51

mode.

• Temperature Range: –40°C to +105°C

The DAC8560 is available in an MSOP-8 package.

• Available in a Tiny MSOP-8 Package

FUNCTIONAL BLOCK DIAGRAM

APPLICATIONS

• Process Control

• Data Acquisition Systems

• Closed-Loop Servo-Control

• PC Peripherals

• Portable Instrumentation

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2SPI, QSPI are trademarks of Motorola, Inc.

3Microwire is a trademark of National Semiconductor.

4All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (33 pages)

PAGE 1
DAC8560 DA C8 560 SLAS464B – DECEMBER 2006 – REVISED NOVEMBER 2011 www.ti.com 16-Bit, Ultra-Low Glitch, Voltage Output Digital-to-Analog Converter with 2.5V, 2ppm/°C Internal Reference Check for Samples: DAC8560 FEATURES DESCRIPTION • • • • The DAC8560 is a low-power, voltage output, 16-bit digital-to-analog converter (DAC). The DAC8560 includes a 2.5V, 2ppm/°C internal reference (enabled by default), giving a full-scale output voltage range of 2.5V.
PAGE 2
DAC8560 SLAS464B – DECEMBER 2006 – REVISED NOVEMBER 2011 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
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DAC8560 SLAS464B – DECEMBER 2006 – REVISED NOVEMBER 2011 www.ti.com ELECTRICAL CHARACTERISTICS VDD = 2.7V to 5.5V, –40°C to +105°C range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ±4 ±12 LSB STATIC PERFORMANCE (1) Resolution 16 Relative accuracy Measured by line passing through codes 485 and 64714 Differential nonlinearity 16-bit Monotonic DAC8560A, DAC8560C DAC8560B, DAC8560D Zero-code error Full-scale error Measured by line passing through codes 485 and 64714.
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DAC8560 SLAS464B – DECEMBER 2006 – REVISED NOVEMBER 2011 www.ti.com ELECTRICAL CHARACTERISTICS (continued) VDD = 2.7V to 5.5V, –40°C to +105°C range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT REFERENCE OUTPUT Output voltage TA = +25°C 2.4975 2.5 2.5025 V Initial accuracy TA = +25°C –0.1 ±0.004 0.1 % DAC8560A, DAC8560B (3) 5 25 DAC8560C, DAC8560D (4) 2 5 Output voltage temperature drift Output voltage noise f = 0.
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DAC8560 SLAS464B – DECEMBER 2006 – REVISED NOVEMBER 2011 www.ti.com PIN CONFIGURATION MSOP-8 (Top View) VDD 1 VREF 2 8 GND 7 DIN DAC8560 VFB 3 6 SCLK VOUT 4 5 SYNC PIN DESCRIPTIONS PIN NAME 1 VDD Power supply input, 2.7V to 5.5V. DESCRIPTION 2 VREF Reference voltage input/output. 3 VFB Feedback connection for the output amplifier. For voltage output operation, tie to VOUT externally. 4 VOUT Analog output voltage from DAC. The output amplifier has rail-to-rail operation.
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DAC8560 SLAS464B – DECEMBER 2006 – REVISED NOVEMBER 2011 www.ti.com SERIAL WRITE OPERATION t9 t1 SCLK 1 24 t8 t3 t4 t2 t7 SYNC t6 t10 t5 DIN DB23 TIMING REQUIREMENTS (1) DB0 DB23 (2) VDD = 2.7V to 5.
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DAC8560 SLAS464B – DECEMBER 2006 – REVISED NOVEMBER 2011 www.ti.com TYPICAL CHARACTERISTICS: Internal Reference At TA = +25°C, unless otherwise noted. INTERNAL REFERENCE VOLTAGE vs TEMPERATURE (Grades A and B) 2.503 2.503 2.502 2.502 2.501 2.501 VREF (V) VREF (V) INTERNAL REFERENCE VOLTAGE vs TEMPERATURE (Grades C and D) 2.500 2.499 2.500 2.499 2.498 2.498 10 Units Shown 2.497 -40 -20 0 20 40 60 100 13 Units Shown 2.
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DAC8560 SLAS464B – DECEMBER 2006 – REVISED NOVEMBER 2011 www.ti.com TYPICAL CHARACTERISTICS: Internal Reference (continued) At TA = +25°C, unless otherwise noted. INTERNAL REFERENCE NOISE DENSITY vs FREQUENCY (2) 400 INTERNAL REFERENCE NOISE 0.
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DAC8560 SLAS464B – DECEMBER 2006 – REVISED NOVEMBER 2011 www.ti.com TYPICAL CHARACTERISTICS: DAC at VDD = 5V At TA = +25°C, external reference used, and DAC output not loaded, unless otherwise noted. 6 4 2 0 -2 -4 -6 LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs DIGITAL INPUT CODE (+25°C) LE (LSB) 1.0 1.0 0.5 0.5 0 -0.5 -1.0 0 -0.5 6 4 2 0 -2 -4 -6 8192 16384 24576 32768 40960 49152 57344 65536 0 8192 16384 24576 32768 40960 49152 Digital Input Code Digital Input Code Figure 13.
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DAC8560 SLAS464B – DECEMBER 2006 – REVISED NOVEMBER 2011 www.ti.com TYPICAL CHARACTERISTICS: DAC at VDD = 5V (continued) At TA = +25°C, external reference used, and DAC output not loaded, unless otherwise noted. SOURCE AND SINK CURRENT CAPABILITY POWER-SUPPLY CURRENT vs DIGITAL INPUT CODE 650 6 VDD = 5.5V Internal VREF = 2.5V 5 VDD = 5V Internal Reference Disabled External VREF = 4.
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DAC8560 SLAS464B – DECEMBER 2006 – REVISED NOVEMBER 2011 www.ti.com TYPICAL CHARACTERISTICS: DAC at VDD = 5V (continued) At TA = +25°C, external reference used, and DAC output not loaded, unless otherwise noted. POWER-SUPPLY CURRENT HISTOGRAM TOTAL HARMONIC DISTORTION vs OUTPUT FREQUENCY 80 70 -40 VDD = 5.5V Internal VREF = 2.5V VDD = 5V, External VREF = 4.
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DAC8560 SLAS464B – DECEMBER 2006 – REVISED NOVEMBER 2011 www.ti.com TYPICAL CHARACTERISTICS: DAC at VDD = 5V (continued) At TA = +25°C, external reference used, and DAC output not loaded, unless otherwise noted. VDD = 5V Ext VREF = 4.096V From Code: 7FFFh To Code: 8000h Glitch: 0.08nV-s GLITCH ENERGY: 5V, 1LSB STEP, FALLING EDGE VOUT (500mV/div) VOUT (500mV/div) GLITCH ENERGY: 5V, 1LSB STEP, RISING EDGE Time (400ns/div) Time (400ns/div) Figure 32.
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DAC8560 SLAS464B – DECEMBER 2006 – REVISED NOVEMBER 2011 www.ti.com TYPICAL CHARACTERISTICS: DAC at VDD = 5V (continued) At TA = +25°C, external reference used, and DAC output not loaded, unless otherwise noted. SIGNAL-TO-NOISE RATIO vs OUTPUT FREQUENCY 98 POWER SPECTRAL DENSITY VDD = 5V, External VREF = 4.
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DAC8560 SLAS464B – DECEMBER 2006 – REVISED NOVEMBER 2011 www.ti.com TYPICAL CHARACTERISTICS: DAC at VDD = 3.6V At TA = +25°C, internal reference used, and DAC output not loaded, unless otherwise noted POWER-SUPPLY CURRENT vs TEMPERATURE 700 650 POWER-SUPPLY CURRENT HISTOGRAM 90 VDD = 3.6V Internal VREF = 2.5V VDD = 3.6V Internal VREF = 2.5V 80 70 Occurrences IDD (mA) 600 550 500 60 50 40 30 20 450 10 400 -40 0 0 40 80 120 450 Temperature (°C) 500 525 550 575 600 IDD (mA) Figure 42.
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DAC8560 SLAS464B – DECEMBER 2006 – REVISED NOVEMBER 2011 www.ti.com TYPICAL CHARACTERISTICS: DAC at VDD = 2.7V At TA = +25°C, internal reference used, and DAC output not loaded, unless otherwise noted 6 4 2 0 -2 -4 -6 LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs DIGITAL INPUT CODE (+25°C) 6 4 2 0 -2 -4 -6 VDD = 2.7V, Internal VREF = 2.5V LE (LSB) LE (LSB) LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs DIGITAL INPUT CODE (–40°C) 1.0 DLE (LSB) DLE (LSB) 1.0 0.5 0 -0.5 -1.0 0 -0.
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DAC8560 SLAS464B – DECEMBER 2006 – REVISED NOVEMBER 2011 www.ti.com TYPICAL CHARACTERISTICS: DAC at VDD = 2.7V (continued) At TA = +25°C, internal reference used, and DAC output not loaded, unless otherwise noted SUPPLY CURRENT vs DIGITAL INPUT CODE POWER-SUPPLY CURRENT vs LOGIC INPUT VOLTAGE 650 1000 VDD = 2.7V Internal VREF = 2.5V VDD = 2.7V, Internal VREF Included, SCLK Input (all other digital inputs = GND) Sweep from 0V to 2.7V 900 600 IDD (mA) IDD (mA) 800 550 700 Sweep from 2.
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DAC8560 SLAS464B – DECEMBER 2006 – REVISED NOVEMBER 2011 www.ti.com TYPICAL CHARACTERISTICS: DAC at VDD = 2.7V (continued) At TA = +25°C, internal reference used, and DAC output not loaded, unless otherwise noted VDD = 2.7V Int VREF = 2.5V From Code: 7FFFh To Code: 8000h Glitch: 0.08nV-s GLITCH ENERGY: 2.7V, 1LSB STEP, FALLING EDGE VOUT (200mV/div) VOUT (200mV/div) GLITCH ENERGY: 2.7V, 1LSB STEP, RISING EDGE Time (400ns/div) Time (400ns/div) Figure 57. GLITCH ENERGY: 2.
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DAC8560 SLAS464B – DECEMBER 2006 – REVISED NOVEMBER 2011 www.ti.com THEORY OF OPERATION DIGITAL-TO-ANALOG CONVERTER (DAC) VREF The DAC8560 architecture consists of a string DAC followed by an output buffer amplifier. Figure 62 shows a block diagram of the DAC architecture. VREF 50kW RDIVIDER VREF 2 50kW VFB R 62kW DAC Register REF (+) Register String REF (-) VOUT R To Output Amplifier (2x Gain) GND Figure 62.
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DAC8560 SLAS464B – DECEMBER 2006 – REVISED NOVEMBER 2011 www.ti.com INTERNAL REFERENCE VREF The DAC8560 includes a 2.5V internal reference that is enabled by default. The internal reference is externally available at the VREF pin. A minimum 100nF capacitor is recommended between the reference output and GND for noise filtering. Reference Disable The internal reference of the DAC8560 is a bipolar transistor-based, precision bandgap voltage reference. The basic bandgap topology is shown in Figure 64.
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DAC8560 SLAS464B – DECEMBER 2006 – REVISED NOVEMBER 2011 SERIAL INTERFACE The DAC8560 has a 3-wire serial interface ( SYNC, SCLK, and DIN) that is compatible with SPI, QSPI, and Microwire interface standards, as well as most DSPs. See the Serial Write Operation timing diagram for an example of a typical write sequence. The write sequence begins by bringing the SYNC line LOW. Data from the DIN line is clocked into the 24-bit shift register on each falling edge of SCLK.
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DAC8560 SLAS464B – DECEMBER 2006 – REVISED NOVEMBER 2011 www.ti.com POWER-DOWN MODES The DAC8560 supports four separate modes of operation. These modes are programmable by setting two bits (PD1 and PD0) in the control register. Table 5 shows how to control the operating mode with data bits PD1 (DB17) and PD0 (DB16). The advantage of this switching is that the output impedance of the device is known while it is in power-down mode. As shown in Table 5, there are three different power-down options.
PAGE 22
DAC8560 SLAS464B – DECEMBER 2006 – REVISED NOVEMBER 2011 www.ti.com APPLICATION INFORMATION INTERNAL REFERENCE The DAC8560 internal reference does not require an external load capacitor for stability because it is stable with any capacitive load. However, for improved noise performance, an external load capacitor of 150nF or larger connected to the VREF output is recommended. Figure 67 shows the typical connections required for operation of the DAC8560 internal reference.
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DAC8560 SLAS464B – DECEMBER 2006 – REVISED NOVEMBER 2011 www.ti.com Long-Term Stability Long-term stability/aging refers to the change of the output voltage of a reference over a period of months or years. This effect lessens as time progresses, as shown in Figure 6, the typical long-term stability curve. The typical drift value for the DAC8560 internal reference is 50ppm from 0 hours to 1900 hours.
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DAC8560 SLAS464B – DECEMBER 2006 – REVISED NOVEMBER 2011 MICROPROCESSOR INTERFACING www.ti.com MicrowireTM DAC8560 (1) DAC8560 TO 8051 Interface CS SYNC See Figure 71 for a serial interface between the DAC8560 and a typical 8051-type microcontroller. The setup for the interface is as follows: TXD of the 8051 drives SCLK of the DAC8560, while RXD drives the serial data line of the device. The SYNC signal is derived from a bit-programmable pin on the port of the 8051. In this case, port line P3.
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DAC8560 SLAS464B – DECEMBER 2006 – REVISED NOVEMBER 2011 www.ti.com LAYOUT A precision analog component requires careful layout, adequate bypassing, and clean, well-regulated power supplies. The DAC8560 offers single-supply operation, and it often is used in close proximity with digital logic, microcontrollers, microprocessors, and digital signal processors.
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DAC8560 SLAS464B – DECEMBER 2006 – REVISED NOVEMBER 2011 www.ti.com REVISION HISTORY NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Original (December 2006) to Revision A Page • Changed Output Voltage parameter min/max values from 2.4995 and 2.5005 to 2.4975 and 2.5025, respectively ........... 4 • Changed Initial Accuracy parameter min/max values from –0.02 and 0.02 to –0.1 and 0.1, respectively ...........................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
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PACKAGE MATERIALS INFORMATION www.ti.com 6-Nov-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing DAC8560IADGKR VSSOP DGK 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 DAC8560IADGKT VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 DAC8560IBDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 6-Nov-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DAC8560IADGKR VSSOP DGK 8 2500 367.0 367.0 35.0 DAC8560IADGKT VSSOP DGK 8 250 210.0 185.0 35.0 DAC8560IBDGKR VSSOP DGK 8 2500 367.0 367.0 35.0 DAC8560IBDGKT VSSOP DGK 8 250 210.0 185.0 35.0 DAC8560ICDGKR VSSOP DGK 8 2500 367.0 367.0 35.0 DAC8560ICDGKT VSSOP DGK 8 250 210.0 185.0 35.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.