Datasheet

DAC8728
DAC8728
ControlLogic
An ogal Monit ro
ToDAC-0,DAC-1,
DAC-2,DAC-3
ToDAC-0,DAC-1,
DAC-2,DAC-3
ToDAC-4,DAC-5,DAC-6,DAC-7
DAC8728
OFFSET-B
AGND-B
V
OUT
-7
V
MON
OFFSET-A
AGND-A
REF-B
Reference
BufferB
InternalTrimming
Zero/Gain;INL
Reference
BufferA
OFFSET
DACA
OFFSET
DACB
DAC-0
Latch-0
Power-Up/
Power-Down
Control
(SameFunctionBlocks
forAllChannels)
REF-A
LDAC
RST
RSTSEL
LDAC
CLR
USB/BTC
BUSY
GPIO
D15
D0
CS
R/W
ParallelBusInterface
IOV
DD
DGND DV
DD
AV
DD
AV
SS
V -0
OUT
V -7
OUT
RefBufferA
RefBufferB
OFFSET-B
Mux
Command
Registers
InputData
Register0
Correction
Engine
(WhenCorrectionEngineDisabled)
DAC-0
Data
UserCalibration:
ZeroRegister0
GainRegsiter0
V -0
OUT
A4
A0
DAC8728
www.ti.com
SBAS466A JUNE 2009REVISED NOVEMBER 2009
Octal, 16-Bit, Low-Power, High-Voltage Output, Parallel Input
DIGITAL-TO-ANALOG CONVERTER
Check for Samples: DAC8728
1
FEATURES
DESCRIPTION
2
Bipolar Output: ±3V, up to ±16.5V
The DAC8728 is a low-power, octal, 16-bit
digital-to-analog converter (DAC). With a 5V
Unipolar Output: 0V to +33V
reference, the output can either be a bipolar ±15V
16-Bit Resolution
voltage when operating from a dual ±15.5V (or
Low Power: 13.5mW/Ch
higher) power supply, or a unipolar 0V to +30V
Relative Accuracy: 4 LSB Max voltage when operating from a +30.5V power supply.
With a 5.5V reference, the output can either be a
Flexible User Calibration
±16.5V for a dual ±17V (or higher) power supply, or a
Low Zero/Full-Scale Error
unipolar 0V to +33V voltage when operating from a
Before User Calibration: ±10 LSB Max
+33.5V (or higher) power supply. This DAC provides
low-power operation, good linearity, and low glitch
After User Calibration: ±1 LSB
over the specified temperature range of –40°C to
Low Glitch: 4nV-s
+105°C. This device is trimmed in manufacturing and
Settling Time: 15μs
has very low zero and full-scale error. In addition,
user calibration can be performed to achieve ±1 LSB
Channel Monitor Output
bipolar zero/full-scale error for a bipolar supply, or ±1
Programmable Gain: x4, x6
LSB zero-code/full-scale error for a unipolar supply
Programmable Offset
over the entire signal chain. The output range can be
offset by using the DAC Offset Register.
16-Bit Parallel Interface:
50MHz (Write Operation)
The DAC8728 features a standard, high-speed, 16-bit
Packages: QFN-56 (8mm x 8mm),
parallel interface that operates at up to 50MHz and is
1.8V, 3V, and 5V logic compatible, to communicate
TQFP-64 (10mm x 10mm)
with a DSP or microprocessor. The eight DACs and
the auxiliary registers are addressed with five address
APPLICATIONS
lines. The device features double-buffered interface
Automatic Test Equipment
logic. An asynchronous load input (LDAC) transfers
PLC and Industrial Process Control
data from the DAC data register to the DAC latch.
Communications
The asynchronous CLR input sets the output of all
eight DACs to AGND. The V
MON
pin is a monitor
output that connects to the individual analog outputs,
the offset DAC, and the reference buffer outputs
through a multiplexer (mux).
The DAC8728 is pin-to-pin compatible with the
DAC8228 (14-bit) and the DAC7728 (12-bit).
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright © 2009, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

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