Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsData collecting ICsData acquisition IC - DA converter (DAC) SSOP 28

www.ti.com

FEATURES DESCRIPTION

APPLICATIONS

DAC

D10

D11

D12

D13

2:4

Decode

SDO

SDI

CLK

DGND RS

MSB LDAC

GND

OUT

GND

OUT

GND

OUT

GND

OUT

A B C D

REF

Input

Power-On

Reset

DAC A

DAC B

DAC C

DAC D

DAC A

DAC B

DAC C

DAC D

DAC8803

SBAS340C – JANUARY 2005 – REVISED FEBRUARY 2006

Quad, Serial Input 14-Bit Multiplying Digital-to-Analog Converter

• Relative Accuracy: 1 LSB Max

The DAC8803 is a quad, 14-bit, current-output

digital-to-analog converter (DAC) designed to operate

• Differential Nonlinearity: 1 LSB Max

from a single +2.7-V to 5-V supply.

• 2-mA Full-Scale Current

with V

REF

= ±10 V

The applied external reference input voltage V

REF

• 0.5-µs Settling Time

determines the full-scale output current. An internal

feedback resistor (R

) provides temperature tracking

• Midscale or Zero-Scale Reset

for the full-scale output when combined with an

• Four Separate 4Q Multiplying Reference

external I-to-V precision amplifier.

Inputs

A doubled buffered serial data interface offers

• Reference Bandwidth: 10 MHz

high-speed, 3-wire, SPI and microcontroller

• Reference Dynamics: -105 dB THD

compatible inputs using serial data in (SDI), clock

• SPI™-Compatible 3-Wire Interface:

(CLK), and a chip select ( CS). In addition, a serial

50-MHz

data out pin (SDO) allows for daisy chaining when

• Double Buffered Registers Enable

multiple packages are used. A common

level-sensitive load DAC strobe ( LDAC) input allows

• Simultaneous Multichannel Update

simultaneous update of all DAC outputs from

• Internal Power-On Reset

previously loaded input registers. Additionally, an

• Compact SSOP-28 Package

internal power-on reset forces the output voltage to

zero at system turn on. An MSB pin allows system

• Industry-Standard Pin Configuration

reset assertion ( RS) to force all registers to zero code

when MSB = 0, or to half-scale code when MSB = 1.

• Automatic Test Equipment

The DAC8803 is packaged in an SSOP package.

• Instrumentation

• Digitally-Controlled Calibration

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

SPI is a trademark of Motorola, Inc.

All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (26 pages)

PAGE 1
DAC8803 www.ti.com SBAS340C – JANUARY 2005 – REVISED FEBRUARY 2006 Quad, Serial Input 14-Bit Multiplying Digital-to-Analog Converter FEATURES DESCRIPTION • • • The DAC8803 is a quad, 14-bit, current-output digital-to-analog converter (DAC) designed to operate from a single +2.7-V to 5-V supply. • • • • • • • • • • • Relative Accuracy: 1 LSB Max Differential Nonlinearity: 1 LSB Max 2-mA Full-Scale Current with VREF = ±10 V 0.
PAGE 2
DAC8803 www.ti.com SBAS340C – JANUARY 2005 – REVISED FEBRUARY 2006 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
PAGE 3
DAC8803 www.ti.com SBAS340C – JANUARY 2005 – REVISED FEBRUARY 2006 ELECTRICAL CHARACTERISTICS VDD = +2.7 V to +5.5 V; IOUTX = Virtual GND, AGNDX = 0 V, VREFA, B, C, D = 10 V, TA = full operating temperature range, unless otherwise noted.
PAGE 4
DAC8803 www.ti.com SBAS340C – JANUARY 2005 – REVISED FEBRUARY 2006 ELECTRICAL CHARACTERISTICS (continued) VDD = +2.7 V to +5.5 V; IOUTX = Virtual GND, AGNDX = 0 V, VREFA, B, C, D = 10 V, TA = full operating temperature range, unless otherwise noted. DAC8803 PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNIT SUPPLY CHARACTERISTICS Power supply range Positive supply current Power dissipation Power supply sensitivity VDD 2.7 5.5 V 2 5 µA 1 2.5 µA Logic inputs = 0 V 0.025 mW ∆VDD = ±5% 0.
PAGE 5
DAC8803 www.ti.
PAGE 6
DAC8803 www.ti.com SBAS340C – JANUARY 2005 – REVISED FEBRUARY 2006 TYPICAL CHARACTERISTICS: VDD = +5 V At TA = +25°C, +VDD = +5 V, unless otherwise noted. Channel A LINEARITY ERROR vs DIGITAL INPUT CODE 1.0 1.0 TA = +25 C 0.8 TA = +25 C 0.8 0.6 0.6 0.4 0.4 DNL (LSB) INL (LSB) DIFFERENTIAL LINEARITY ERROR vs DIGITAL INPUT CODE 0.2 0 −0.2 0.2 0 −0.2 −0.4 −0.4 −0.6 −0.6 −0.8 −0.8 −1.0 −1.0 0 2048 4096 6144 0 8192 10240 12288 14336 16383 2048 4096 Digital Input Code 1.0 Figure 2.
PAGE 7
DAC8803 www.ti.com SBAS340C – JANUARY 2005 – REVISED FEBRUARY 2006 TYPICAL CHARACTERISTICS: VDD = +5 V (continued) At TA = +25°C, +VDD = +5 V, unless otherwise noted. Channel B LINEARITY ERROR vs DIGITAL INPUT CODE 1.0 1.0 TA = +25 C 0.8 TA = +25 C 0.8 0.6 0.6 0.4 0.4 DNL (LSB) INL (LSB) DIFFERENTIAL LINEARITY ERROR vs DIGITAL INPUT CODE 0.2 0 −0.2 0.2 0 −0.2 −0.4 −0.4 −0.6 −0.6 −0.8 −0.8 −1.0 −1.0 0 2048 4096 6144 0 8192 10240 12288 14336 16383 2048 4096 Digital Input Code 1.
PAGE 8
DAC8803 www.ti.com SBAS340C – JANUARY 2005 – REVISED FEBRUARY 2006 TYPICAL CHARACTERISTICS: VDD = +5 V (continued) At TA = +25°C, +VDD = +5 V, unless otherwise noted. Channel C LINEARITY ERROR vs DIGITAL INPUT CODE 1.0 1.0 TA = +25 C 0.8 TA = +25 C 0.8 0.6 0.6 0.4 0.4 DNL (LSB) INL (LSB) DIFFERENTIAL LINEARITY ERROR vs DIGITAL INPUT CODE 0.2 0 −0.2 0.2 0 −0.2 −0.4 −0.4 −0.6 −0.6 −0.8 −0.8 −1.0 −1.0 0 2048 4096 6144 0 8192 10240 12288 14336 16383 2048 4096 Digital Input Code 1.
PAGE 9
DAC8803 www.ti.com SBAS340C – JANUARY 2005 – REVISED FEBRUARY 2006 TYPICAL CHARACTERISTICS: VDD = +5 V (continued) At TA = +25°C, +VDD = +5 V, unless otherwise noted. Channel D LINEARITY ERROR vs DIGITAL INPUT CODE 1.0 1.0 TA = +25 C 0.8 TA = +25 C 0.8 0.6 0.6 0.4 0.4 DNL (LSB) INL (LSB) DIFFERENTIAL LINEARITY ERROR vs DIGITAL INPUT CODE 0.2 0 −0.2 0.2 0 −0.2 −0.4 −0.4 −0.6 −0.6 −0.8 −0.8 −1.0 −1.0 0 2048 4096 6144 0 8192 10240 12288 14336 16383 2048 4096 1.
PAGE 10
DAC8803 www.ti.com SBAS340C – JANUARY 2005 – REVISED FEBRUARY 2006 TYPICAL CHARACTERISTICS: VDD = +5 V (continued) At TA = +25°C, +VDD = +5 V, unless otherwise noted. SUPPLY CURRENT vs LOGIC INPUT VOLTAGE REFERENCE MULTIPLYING BANDWIDTH 180 VDD = +5.
PAGE 11
DAC8803 www.ti.com SBAS340C – JANUARY 2005 – REVISED FEBRUARY 2006 TYPICAL CHARACTERISTICS: VDD = +2.7 V At TA = +25°C, +VDD = +2.7 V, unless otherwise noted. Channel A LINEARITY ERROR vs DIGITAL INPUT CODE 1.0 1.0 TA = +25 C 0.8 TA = +25 C 0.8 0.6 0.6 0.4 0.4 DNL (LSB) INL (LSB) DIFFERENTIAL LINEARITY ERROR vs DIGITAL INPUT CODE 0.2 0 −0.2 0.2 0 −0.2 −0.4 −0.4 −0.6 −0.6 −0.8 −0.8 −1.0 −1.0 0 2048 4096 6144 0 8192 10240 12288 14336 16383 2048 4096 Digital Input Code 1.
PAGE 12
DAC8803 www.ti.com SBAS340C – JANUARY 2005 – REVISED FEBRUARY 2006 TYPICAL CHARACTERISTICS: VDD = +2.7 V (continued) At TA = +25°C, +VDD = +2.7 V, unless otherwise noted. Channel B LINEARITY ERROR vs DIGITAL INPUT CODE 1.0 1.0 TA = +25 C 0.8 TA = +25 C 0.8 0.6 0.6 0.4 0.4 DNL (LSB) INL (LSB) DIFFERENTIAL LINEARITY ERROR vs DIGITAL INPUT CODE 0.2 0 −0.2 0.2 0 −0.2 −0.4 −0.4 −0.6 −0.6 −0.8 −0.8 −1.0 −1.
PAGE 13
DAC8803 www.ti.com SBAS340C – JANUARY 2005 – REVISED FEBRUARY 2006 TYPICAL CHARACTERISTICS: VDD = +2.7 V (continued) At TA = +25°C, +VDD = +2.7 V, unless otherwise noted. Channel C LINEARITY ERROR vs DIGITAL INPUT CODE 1.0 1.0 TA = +25 C 0.8 TA = +25 C 0.8 0.6 0.6 0.4 0.4 DNL (LSB) INL (LSB) DIFFERENTIAL LINEARITY ERROR vs DIGITAL INPUT CODE 0.2 0 −0.2 0.2 0 −0.2 −0.4 −0.4 −0.6 −0.6 −0.8 −0.8 −1.0 −1.
PAGE 14
DAC8803 www.ti.com SBAS340C – JANUARY 2005 – REVISED FEBRUARY 2006 TYPICAL CHARACTERISTICS: VDD = +2.7 V (continued) At TA = +25°C, +VDD = +2.7 V, unless otherwise noted. Channel D LINEARITY ERROR vs DIGITAL INPUT CODE 1.0 1.0 TA = +25 C 0.8 TA = +25 C 0.8 0.6 0.6 0.4 0.4 DNL (LSB) INL (LSB) DIFFERENTIAL LINEARITY ERROR vs DIGITAL INPUT CODE 0.2 0 −0.2 0.2 0 −0.2 −0.4 −0.4 −0.6 −0.6 −0.8 −0.8 −1.0 −1.
PAGE 15
DAC8803 www.ti.com SBAS340C – JANUARY 2005 – REVISED FEBRUARY 2006 TYPICAL CHARACTERISTICS: VDD = +2.7 V (continued) At TA = +25°C, +VDD = +2.7 V, unless otherwise noted. DAC GLITCH ENDPOINT ERROR vs TEMPERATURE 3 Endpoint Error (mV) Output Voltage (50mV/div) 2 Code: 1FFFh to 2000h DAC C DAC B 1 0 DAC A −1 DAC D −2 LDAC Pulse −3 −40 Time (0.2µs/div) −20 0 Figure 55. 20 40 Temperature ( C) 60 80 100 Figure 56.
PAGE 16
DAC8803 www.ti.com SBAS340C – JANUARY 2005 – REVISED FEBRUARY 2006 THEORY OF OPERATION CIRCUIT OPERATION The DAC8803 contains four, 14-bit, current-output, digital-to-analog converters (DACs) respectively. Each DAC has its own independent multiplying reference input. The DAC8803 uses a 3-wire SPI-compatible serial data interface, with a configurable asynchronous RS pin for half-scale (MSB = 1) or zero-scale (MSB = 0) preset.
PAGE 17
DAC8803 www.ti.com SBAS340C – JANUARY 2005 – REVISED FEBRUARY 2006 Figure 26 shows the gain versus frequency performance at various attenuation settings using a 3 pF external feedback capacitor connected across the IOUTX and RFBX terminals. In order to maintain good analog performance, power supply bypassing of 0.01 µF, in parallel with 1 µF, is recommended. Under these conditions, clean power supply with low ripple voltage capability should be used.
PAGE 18
DAC8803 www.ti.com SBAS340C – JANUARY 2005 – REVISED FEBRUARY 2006 VREF A B C D CS EN VDD CLK SDI SDO D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 A0 A1 14 RFBA DAC A Register R Input Register R DAC A IOUTA AGNDA RFBB DAC B Register R Input Register R DAC B DAC A B C D 2:4 Decode IOUTC AGNDB RFBC DAC C Register R Input Register R DAC C IOUTC AGNDC RFBD DAC D Register R Input Register R DAC D IOUTD AGNDD Set MSB Set MSB PowerOn Reset DGND AGNDF MSB LDAC RS Figure 60.
PAGE 19
DAC8803 www.ti.com SBAS340C – JANUARY 2005 – REVISED FEBRUARY 2006 Once the data is properly aligned in the shift register, the positive edge of the CS initiates the transfer of new data to the target DAC register, determined by the decoding of address bits A1and A0. For the DAC8803, Table 2 and Table 3 define the characteristics of the software serial interface. Figure 61 shows the equivalent logic interface for the key digital control pins for the DAC8803.
PAGE 20
DAC8803 www.ti.com SBAS340C – JANUARY 2005 – REVISED FEBRUARY 2006 PCB LAYOUT The DAC8803 is a high-accuracy DAC that can have its performance compromised by grounding and printed circuit board (PCB) lead trace resistance. The 14-bit DAC8803 with a 10-V full-scale range has an LSB value of 610 µV. The ladder and associated reference and analog ground currents for a given channel can be as high as 2 mA.
PAGE 21
DAC8803 www.ti.com SBAS340C – JANUARY 2005 – REVISED FEBRUARY 2006 APPLICATION INFORMATION The DAC8803, a 2-quadrant multiplying DAC, can be used to generate a unipolar output. The polarity of the full-scale output IOUT is the inverse of the input reference voltage at VREF. Some applications require full 4-quadrant multiplying capabilities or bipolar output swing, as shown in Figure 63. An additional external op amp A2 is added as a summing amp.
PAGE 22
PACKAGE OPTION ADDENDUM www.ti.
PAGE 23
PACKAGE MATERIALS INFORMATION www.ti.com 30-Jan-2009 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel Diameter Width (mm) W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant DAC8803IDBR SSOP DB 28 2000 330.0 16.4 8.1 10.4 2.5 12.0 16.0 Q1 DAC8803IDBT SSOP DB 28 250 330.0 16.4 8.1 10.4 2.5 12.0 16.
PAGE 24
PACKAGE MATERIALS INFORMATION www.ti.com 30-Jan-2009 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DAC8803IDBR SSOP DB 28 2000 346.0 346.0 33.0 DAC8803IDBT SSOP DB 28 250 346.0 346.0 33.
PAGE 25
MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
PAGE 26
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.