Datasheet

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THEORY OF OPERATION
GENERAL DESCRIPTION
DIGITAL-TO-ANALOG SECTIONS
R R
12−Bit R−2R Ladder Four MSBs Decoded into
15 Equal Segments
2R2R 2R 2R
S0 S1 S11
2R
V
OUT
E15
2R
E2
2R
E1
V
REF
OUTPUT RANGE
DAC8832
SBAS380B – FEBRUARY 2006 – REVISED SEPTEMBER 2007
The DAC8832 is a single, 16-bit, serial-input, voltage-output DAC. It operates from a single supply ranging from
2.7 V to 5 V, and typically consumes 5 μ A. Data are written to this device in a 16-bit word format, via an SPI
serial interface. To ensure a known power-up state, the DAC8832 is designed with a power-on reset function.
The DAC8832 is reset to mid-scale code. In unipolar mode, the DAC8832 is reset to 1/2 × V
REF
, and in bipolar
mode, is reset to 0 V. Kelvin sense connections for the reference and analog ground are also included.
The DAC architecture consists of two matched DAC sections and is segmented. A simplified circuit diagram is
shown in Figure 43 . The four MSBs of the 16-bit data word are decoded to drive 15 switches, E1 to E15. Each of
these switches connects one of 15 matched resistors to either AGND or V
REF
. The remaining 12 bits of the data
word drive switches S0 to S11 of a 12-bit voltage mode R-2R ladder network.
Figure 43. DAC Architecture
The output of the DAC is:
V
OUT
= (V
REF
× Code)/65536
Where Code is the decimal data word loaded to the DAC latch.
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