Datasheet

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APPLICATION INFORMATION
UNIPOLAR OUTPUT OPERATION
0.1
µ
F
V
DD
+5 V
RFB
INV
AGNDF
AGNDS
DAC
DAC Latch
Input
Register
DAC8832
+V
−
V
SDI
SCLK
LDAC
V
OUT
R
FB
R
INV
V
REF
−
S V
REF
−
F
Serial Interface
and Control Logic
CS
+2.5 V
+
0.1
µ
F 10
µ
F
DGND
V
O
= 0 to +V
REF
OPA277
OPA704
OPA727
V
OUT_UNI
+
D
2
16
ǒ
V
REF
) V
GE
Ǔ
) V
ZSE
) INL
DAC8832
SBAS380B – FEBRUARY 2006 – REVISED SEPTEMBER 2007
The DAC8832 is capable of driving unbuffered loads of 60 k Ω . Unbuffered operation results in low supply current
(typically 5 μ A) and a low offset error. The DAC8832 can be configured to output both unipolar and bipolar
voltages. Figure 44 shows a typical unipolar output voltage circuit. The code table for this mode of operation is
shown in Table 1 .
Figure 44. Unipolar Output Mode
Table 1. Unipolar Code
DAC LATCH CONTENTS
MSB LSB ANALOG OUTPUT
1111 1111 1111 1111 V
REF
× (65,535/65,536)
1000 0000 0000 0000 V
REF
× (32,768/65,536) = 1/2 V
REF
0000 0000 0000 0001 V
REF
× (1/65,536)
0000 0000 0000 0000 0 V
Assuming a perfect reference, the worst-case output voltage may be calculated in the following equation:
Unipolar Mode Worst-Case Output:
Where:
V
OUT_UNI
= Unipolar mode worst-case output
D = Code loaded to DAC
V
REF
= Reference voltage applied to part
V
GE
= Gain error in volts
V
ZSE
= Zero scale error in volts
INL = Integral nonlinearity in volts
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