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User's Guide

SLAU233 – September 2007

DAC8871 Evaluation Module

This user’s guide describes the characteristics, operation, and the use of the DAC8871 evaluation module

(EVM). It covers all pertinent areas involved to properly use this EVM board along with the devices that it

supports. The document includes the physical printed-circuit board layout, schematic diagram, and circuit

descriptions.

Related Documentation From Texas Instruments

To obtain a copy of any of the following TI documents, call the Texas Instruments Literature Response

Center at (800) 477–8924 or the Product Information Center (PIC) at (972) 644–5580. When ordering,

identify this manual by its title and literature number. Updated documents can also be obtained through

the TI Web site at www.ti.com .

Data Sheet Literature Number

DAC8871 SBAS396

REF102 SBVS022

OPA211 SBOS377

OPA277 SBOS079

OPA4227 SBOS110

INA105 SBOS145

Questions about this or other data converter EVMs?

If you have questions about this or other Texas Instruments data converter evaluation modules, send

an e-mail to the Data Converter Application Team at dataconvapps@list.ti.com . Include in the subject

heading the product in which you are interested.

Contents

1 EVM Overview ............................................................................................................... 2

2 PCB Design and Performance ............................................................................................. 4

3 EVM Operation ............................................................................................................... 9

List of Figures

1 Block Diagram ................................................................................................................ 4

2 Top Silkscreen ............................................................................................................... 5

3 Layer 1, Top Signal Plane .................................................................................................. 5

4 Layer 2, Bottom Signal Plane .............................................................................................. 6

5 Bottom Silkscreen ........................................................................................................... 6

6 Drill Drawing .................................................................................................................. 7

7 INL and DNL Characteristic Plot ........................................................................................... 8

8 DAC8871 EVM Default Jumper Configuration ......................................................................... 10

List of Tables

1 Bill of Materials ............................................................................................................... 8

2 Factory Default Jumper Setting .......................................................................................... 10

3 Digital Control Interface Signal Mapping for J2/P2 Header/Socket Connectors ................................... 11

C5000, C6000 are trademarks of Texas Instruments.

SPI is a trademark of Motorola, Inc.

LabVIEW is a trademark of National Instruments Corporation.

SLAU233 – September 2007 DAC8871 Evaluation Module 1

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Summary of content (16 pages)

PAGE 1
User's Guide SLAU233 – September 2007 DAC8871 Evaluation Module This user’s guide describes the characteristics, operation, and the use of the DAC8871 evaluation module (EVM). It covers all pertinent areas involved to properly use this EVM board along with the devices that it supports. The document includes the physical printed-circuit board layout, schematic diagram, and circuit descriptions.
PAGE 2
www.ti.com EVM Overview 4 1 Jumper Setting Function .................................................................................................. 12 EVM Overview This section gives a general overview of the DAC8871 evaluation module (EVM) and describes some of the factors to be considered when using this module. 1.1 Features This EVM features the DAC8871 digital-to-analog converter.
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www.ti.com EVM Overview For optimum performance, the DAC8871 supports a set Kelvin connection to the external reference via VREFHF and VREFHS pins, as well as VREFLF and VREFLS pins. This option for reference configuration minimizes the internal errors caused by the changing reference current and its associated circuit impedances. A +10-V precision voltage reference is provided for the external reference source of the DAC through REF102, U3.
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www.ti.com PCB Design and Performance VCC VCC GND VSS GND VDD ±5VA +3.3VD VSS TP2 U5A REF102 VCC INA105 VDD W3 +VREF (J3) (P3) TP1 -VREF W1 VREFL VREFH VSS VCC VDD (J1) (P1) U2 VOUT (J2) (P2) DAC Module DGND AGND CS FS SDI SCLK LDAC RST VSS Figure 1.
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www.ti.com PCB Design and Performance Figure 2. Top Silkscreen Figure 3.
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www.ti.com PCB Design and Performance Figure 4. Layer 2, Bottom Signal Plane Figure 5.
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www.ti.com PCB Design and Performance Figure 6. Drill Drawing 2.2 EVM Performance The EVM performance test is carried out using a high-density DAC bench test board, an Agilent 3458A digital multimeter, and a personal computer running the LabVIEW™ software. The EVM board is tested for all codes of 65535, and the device under test (DUT) is allowed to settle for 1 ms before the meter is read. This process is repeated for all codes to generate the measurements for INL and DNL.
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www.ti.com PCB Design and Performance Figure 7. INL and DNL Characteristic Plot 2.3 Bill of Materials Table 1. Bill of Materials Qty. (1) (2) 8 Value Designators Description Vendor Vendor Part Number 1 N/A N/A Printed Wiring Board Texas Instruments 6488681 0 100pF C1 (1) 0608, Ceramic, COG, 50V, 5% TDK C1608COG1H101J 3 10μF C2 C3 C4 1210, Ceramic, X7R, 16V TDK C3225X7R1C106Z 10 0.
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www.ti.com EVM Operation Table 1. Bill of Materials (continued) Qty. (3) 3 Value Designators Description Vendor Vendor Part Number 1 5 × 2 × 0.1 SMT J3 (Top Side) 5 Pin, Dual Row, TH Header (10 Pos.) Samtec TSM-105-01-T-DV-P 2 10 × 2 × 0.1 SMT P1 P2 Side) 10 Pin, Dual Row, TH Header (20 Pos.) Samtec SSW-110-22-F-D-VS-K 1 5 × 2 × 0.1 SMT P3 (3)(Bottom Side) 5 Pin, Dual Row, TH Header (10 Pos.
PAGE 10
www.ti.com EVM Operation 3.1 Factory Default Setting The EVM board is set to its default configuration from the factory as described in the Table 2 to operate in bipolar ±10-V mode of operation. Figure 8 shows the default jumper configuration as described in the table for the DAC8871. Table 2. Factory Default Jumper Setting Reference Jumper Position Function W1 1-2 The onboard reference of –10 V is routed to VREFL of the DAC8871.
PAGE 11
www.ti.com EVM Operation 3.3 Digital Control Interface The DAC8871 supports the standard high-speed SPI serial interface to communicate with microprocessors or DSP devices. The EVM incorporates a pass-through connector to accommodate the digital control interface to the DAC8871 device via J2 (top side) and P2 (bottom side) header/socket connectors. The signals on this pass-through connector are shown in Table 3. Table 3. Digital Control Interface Signal Mapping for J2/P2 Header/Socket Connectors 3.3.
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www.ti.com EVM Operation 3.3.5 RST Signal The RST signal is the control input necessary to reset the device to a known state that is determined by the state of the RSTSEL pin when the RST pin is asserted. If RSTSEL is tied to DGND, the DAC latch is cleared (0 V) and VOUT is minimum scale (i.e., VREFL). If RSTSEL is tied to VDD, the DAC latch is set to midscale and VOUT is equal to (VREFH – VREFL)/2. This pin is active low. 3.
PAGE 13
www.ti.com EVM Operation Table 4. Jumper Setting Function (continued) Reference Jumper Setting 1 Function 3 GPIO2/TOUT signal from J2-15 is routed to drive the LDAC signal of the DAC8871. W6 1 3 GPIO1/INT signal from J2-17 is routed to drive the LDAC signal of the DAC8871. Allows the onboard REF102 output of +10 V to propagate through for the DAC8871’s voltage reference high and low source (VREFH, VREFL).
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Revision History REV ECN Number 2 A Approved Prototype Production Release JLP JLP VDD R9 J1 D TP3 6.2K 2 4 6 8 10 12 14 16 18 20 R13 0 VSS DAC8871EVM BOM = 6488680 DAC8871EVM PWB = 6488681 DAC8871EVM DDB (BLOCK) = 6488682 DAC8871EVM PCA = 6488683 DAC8871EVM KIT (BLOCK) = 6488684 DAC8871EVM SFT = 6488685 W4 R10 10K C7 4 1 3 5 7 9 11 13 15 17 19 NOTES: (1) U5B and RP1 should only be utilize as replacement circuit When INA105 is not available. See BOM for assembly instructions. 0.
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EVALUATION BOARD/KIT IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have electronics training and observe good engineering practice standards.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.