Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsInterface ICsInterface IC - drivers xDSL 2/0 SOIC 8

DRV1100

In+

In–

Out+

+5V

G = 3V/V

DRV1100

Patent

Pending

GND

Out–

4Ω

Protection

1:4

Transformer

135Ω

HIGH POWER DIFFERENTIAL DRIVER AMPLIFIER

OPA658

DRV1100

International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111

Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132

DESCRIPTION

The DRV1100 is fixed gain differential line driver

designed for very low harmonic distortion at the high

powers required of xDSL line interface standards.

Operating on a single +5V supply, it can deliver

230mA peak output current and 9.5Vp-p differential

output voltage swing. This high output power on a

single +5V supply makes the DRV1100 an excellent

choice for the xDSL applications that require up to

17dBm power onto the line with high crest factors.

The DRV1100 is available in both 8-pin plastic DIP

and SO-8 packages.

FEATURES

● HIGH OUTPUT CURRENT: 230mA

● SINGLE SUPPLY OPERATION: 5V

● 5MHz BANDWIDTH: 6Vp-p into 15Ω

● VERY LOW THD AT HIGH POWER:

–72dBc at 6Vp-p, 100kHz, 100Ω

● LOW QUIESCENT CURRENT: 11mA

● FIXED DIFFERENTIAL GAIN: 3V/V

APPLICATIONS

● xDSL TWISTED PAIR LINE DRIVER

● COMMUNICATIONS LINE DRIVER

● TRANSFORMER DRIVER

● SOLENOID DRIVER

● HIGH POWER AUDIO DRIVER

● CRT YOKE DRIVER

1996 Burr-Brown Corporation PDS-1354 Printed in U.S.A. December, 1996

SBWS004

Summary of content (13 pages)

PAGE 1
® DRV1100 DR OPVA1100 658 DRV 110 0 HIGH POWER DIFFERENTIAL DRIVER AMPLIFIER FEATURES DESCRIPTION ● ● ● ● The DRV1100 is fixed gain differential line driver designed for very low harmonic distortion at the high powers required of xDSL line interface standards. Operating on a single +5V supply, it can deliver 230mA peak output current and 9.5Vp-p differential output voltage swing.
PAGE 2
SPECIFICATIONS At VDD = +5.0V, VCM = VDD/2, TA = 25°C, unless otherwise specified. DRV1100P, U PARAMETER CONDITIONS AC PERFORMANCE –3dB Bandwidth Differential Slew Rate Step Response Delay(1) Settling Time to 1%, Step Input Settling Time to 1%, Step Input Settling Time to 0.1%, Step Input Settling Time to 0.
PAGE 3
PIN CONFIGURATIONS ABSOLUTE MAXIMUM RATINGS Analog Inputs: Current .............................................. ±100mA, Momentary ±10mA, Continuous Voltage ....................................... GND –0.3V to VDD +0.2V Analog Outputs Short Circuit to Ground (+25°C) ..................... Momentary Analog Outputs Short Circuit to VDD (+25°C) ........................... Momentary VDD to GND .............................................................................. –0.3V to 6V Junction Temperature ......
PAGE 4
TYPICAL PERFORMANCE CURVES At VDD = +5.0V, VCM = VDD/2, TA = 25°C, unless otherwise specified. LARGE SIGNAL FREQUENCY RESPONSE SMALL SIGNAL FREQUENCY RESPONSE RL = 1kΩ 9.5 8.5 RL = 100Ω 7.5 6.5 Differential Gain (dB) Differential Gain (dB) 8.5 RL = 15Ω 5.5 4.5 3.5 7.5 VO = 1Vp-p 10K 5.5 1M RL = 15Ω 4.5 3.5 1.5 100K RL = 100Ω 6.5 2.5 2.5 1.5 RL = 1kΩ 9.
PAGE 5
TYPICAL PERFORMANCE CURVES (CONT) At VDD = +5.0V, VCM = VDD/2, TA = 25°C, unless otherwise specified. 100kHz THD –40 –50 –50 RL = 15Ω THD (dBc) THD (dBc) 10kHz THD –40 –60 –70 RL = 15Ω –60 RL = 100Ω –70 RL = 100Ω –80 –80 RL = 1kΩ RL = 1kΩ –90 –90 1 2 3 4 5 7 8 9 10 1 2 6 SMALL SIGNAL STEP RESPONSE LARGE SIGNAL STEP RESPONSE Output RL = 100Ω 0 –0.
PAGE 6
TYPICAL PERFORMANCE CURVES (CONT) At VDD = +5.0V, VCM = VDD/2, TA = 25°C, unless otherwise specified. DIFFERENTIAL OUTPUT IMPEDANCE DIFFERENTIAL INPUT VOLTAGE NOISE Impedance (Ω) 10 100 1 0.
PAGE 7
APPLICATIONS INFORMATION INTERNAL BLOCK DIAGRAM The DRV1100 is a true differential input to differential output fixed gain amplifier. Operating on a single +5V power supply, it provides an internally fixed differential gain of +3 and a common-mode gain of +1 from the input to output. Fabricated on an advanced CMOS process, it offers very high input impedance along with a low impedance 230mA output drive. Figure 1 shows a simplified internal block diagram.
PAGE 8
+5V Protection Circuits DRV1100 Out+ 4Ω In+ Line Impedance 4Ω In– 135Ω Out– 1:4 Transformer GND FIGURE 3. Typical Digital Subscriber Line Application. loss through the series impedance matching resistors shown in Figure 3. Twice the required line power must be delivered by the DRV1100 through the frequency band of interest with the distortion required by the system. ground or to the supply without damage. The outputs are not, however, designed for a continuous short to ground or the supply.
PAGE 9
Often, the RB resistors will be set to a relatively high value (> 10kΩ) to minimize quiescent current in the reference path. If a lower input impedance is desired, additional terminating resistors may be added to the input side of the blocking capacitors (CB). INTERNAL TEMPERATURE RISE OF DRV1100 IN SOIC 90 80 Limit at 85°C Ambient Temperature Rise 70 The circuit of Figure 5 may also be operated with only a single ended input.
PAGE 10
PACKAGE OPTION ADDENDUM www.ti.
PAGE 11
PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device DRV1100U/2K5 Package Package Pins Type Drawing SOIC D 8 SPQ Reel Reel Diameter Width (mm) W1 (mm) 2500 330.0 12.4 Pack Materials-Page 1 A0 (mm) B0 (mm) K0 (mm) P1 (mm) 6.4 5.2 2.1 8.0 W Pin1 (mm) Quadrant 12.
PAGE 12
PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DRV1100U/2K5 SOIC D 8 2500 346.0 346.0 29.
PAGE 13
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.