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DRV8830

www.ti.com

SLVSAB2F –MAY 2010– REVISED FEBRUARY 2012

LOW-VOLTAGE MOTOR DRIVER WITH SERIAL INTERFACE

Check for Samples: DRV8830

FEATURES

• H-Bridge Voltage-Controlled Motor Driver

• Current Limit Circuit and Fault Output

– Drives DC Motor, One Winding of a Stepper • Thermally Enhanced Surface Mount Packages

Motor, or Other Actuators/Loads

APPLICATIONS

– Efficient PWM Voltage Control for Constant

Motor Speed With Varying Supply Voltages

• Battery-Powered:

– Low MOSFET On-Resistance:

– Printers

HS + LS 450 mΩ

– Toys

• 1-A Maximum DC/RMS or Peak Drive Current

– Robotics

• 2.75-V to 6.8-V Operating Supply Voltage

– Cameras

Range

– Phones

• 300-nA (Typical) Sleep Mode Current

• Small Actuators, Pumps, etc.

• Serial I

C-Compatible Interface

• Multiple Address Selections Allow Up to 9

Devices on One I

C Bus

DESCRIPTION

The DRV8830 provides an integrated motor driver solution for battery-powered toys, printers, and other

low-voltage or battery-powered motion control applications. The device has one H-bridge driver, and can drive

one DC motor or one winding of a stepper motor, as well as other loads like solenoids. The output driver block

consists of N-channel and P-channel power MOSFET’s configured as an H-bridge to drive the motor winding.

Provided with sufficient PCB heatsinking, the DRV8830 can supply up to 1-A of DC/RMS or peak output current.

It operates on power supply voltages from 2.75 V to 6.8 V.

To maintain constant motor speed over varying battery voltages while maintaining long battery life, a PWM

voltage regulation method is provided. The output voltage is programmed via an I

C-compatible interface, using

an internal voltage reference and DAC.

Internal protection functions are provided for over current protection, short circuit protection, under voltage

lockout and overtemperature protection.

The DRV8830 is available in tiny 3-mm x 3-mm 10-pin MSOP and WSON packages with PowerPAD™

(Eco-friendly: RoHS & no Sb/Br).

ORDERING INFORMATION

(1)

ORDERABLE PART TOP-SIDE

PACKAGE

(2)

NUMBER MARKING

Reel of 2500 DRV8830DGQR 8830

PowerPAD™ (MSOP) - DGQ

Tube of 80 DRV8830DGQ 8830

Reel of 3000 DRV8830DRCR 8830

PowerPAD™ (WSON) - DRC

Reel of 250 DRV8830DRCT 8830

(1) For the most current packaging and ordering information, see the Package Option Addendum at the end of this document, or see the TI

web site at www.ti.com.

(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2PowerPAD is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (24 pages)

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DRV8830 SLVSAB2F – MAY 2010 – REVISED FEBRUARY 2012 www.ti.com LOW-VOLTAGE MOTOR DRIVER WITH SERIAL INTERFACE Check for Samples: DRV8830 FEATURES 1 • 2 • • • • • H-Bridge Voltage-Controlled Motor Driver – Drives DC Motor, One Winding of a Stepper Motor, or Other Actuators/Loads – Efficient PWM Voltage Control for Constant Motor Speed With Varying Supply Voltages – Low MOSFET On-Resistance: HS + LS 450 mΩ 1-A Maximum DC/RMS or Peak Drive Current 2.75-V to 6.
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DRV8830 SLVSAB2F – MAY 2010 – REVISED FEBRUARY 2012 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
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DRV8830 SLVSAB2F – MAY 2010 – REVISED FEBRUARY 2012 www.ti.com Table 1. TERMINAL FUNCTIONS EXTERNAL COMPONENTS OR CONNECTIONS NAME PIN I/O (1) GND 5 - Device ground VCC 4 - Device and motor supply Bypass to GND with a 0.1-μF (minimum) ceramic capacitor. SDA 9 IO Serial data Data line of I2C serial bus SCL 10 I Serial clock Clock line of I2C serial bus A0 7 I Address set 0 A1 8 I Address set 1 Connect to GND, VCC, or open to set I2C base address.
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DRV8830 SLVSAB2F – MAY 2010 – REVISED FEBRUARY 2012 www.ti.com THERMAL INFORMATION DRV8830 THERMAL METRIC (1) Junction-to-ambient thermal resistance (2) θJA (3) DRV8830 DGQ DRC 10 PINS 10 PINS 69.3 50.2 θJCtop Junction-to-case (top) thermal resistance 63.5 78.4 θJB Junction-to-board thermal resistance (4) 51.6 18.8 ψJT Junction-to-top characterization parameter (5) 1.5 1.1 ψJB Junction-to-board characterization parameter (6) 23.2 17.
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DRV8830 SLVSAB2F – MAY 2010 – REVISED FEBRUARY 2012 www.ti.com ELECTRICAL CHARACTERISTICS VCC = 2.75 V to 6.8 V, TA = -40°C to 85°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT POWER SUPPLIES IVCC VCC operating supply current VCC = 5 V 1.4 2 mA IVCCQ VCC sleep mode supply current VCC = 5 V, TA = 25°C 0.3 1 μA VCC undervoltage lockout voltage VCC rising 2.575 2.75 VCC falling 2.47 VUVLO V LOGIC-LEVEL INPUTS VIL Input low voltage 0.25 x VCC 0.
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DRV8830 SLVSAB2F – MAY 2010 – REVISED FEBRUARY 2012 www.ti.com I2C TIMING REQUIREMENTS (1) VCC = 2.75 V to 6.8 V, TA = -40°C to 85°C (unless otherwise noted) STANDARD MODE MIN TYP FAST MODE MAX MIN 100 0 UNIT TYP MAX fscl I2C clock frequency 0 tsch I2C clock high time 4 0.6 µs tscl I2C clock low time 4.7 1.3 µs 2 tsp I C spike time tsds I2C serial data setup time 0 tsdh I2C serial data hold time 50 0 400 50 kHz ns 250 100 ns 0 0 ns 2 1000 20+0.
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DRV8830 SLVSAB2F – MAY 2010 – REVISED FEBRUARY 2012 www.ti.com TYPICAL PERFORMANCE GRAPHS EFFICIENCY EFFICIENCY vs LOAD CURRENT (VIN = 5 V, VOUT = 3 V) 100% 95% 90% 85% 80% 75% 70% 65% 60% 55% 50% 0.2 0.4 0.6 0.8 LOAD - A Figure 3. EFFICIENCY vs OUTPUT VOLTAGE (VIN = 5 V, IOUT = 500 mA) 100% 90% 80% EFFICENCY 70% 60% 50% 40% 30% Linear Regulator 20% DRV8830 10% 0% 0.5 1.5 2.5 3.5 4.5 5.5 VOUT - V Figure 4.
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DRV8830 SLVSAB2F – MAY 2010 – REVISED FEBRUARY 2012 www.ti.com FUNCTIONAL DESCRIPTION PWM Motor Driver The DRV8830 contains an H-bridge motor driver with PWM voltage-control circuitry with current limit circuitry. A block diagram of the motor control circuitry is shown below. VCC VCC OCP IN1 OUT 1 IN2 Predrive PWM DCM OUT2 VSET + COMP OCP /4 Integrator DIFF + - ITRIP ISEN COMP REF Figure 5.
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DRV8830 SLVSAB2F – MAY 2010 – REVISED FEBRUARY 2012 www.ti.com Voltage Regulation The DRV8830 provides the ability to regulate the voltage applied to the motor winding. This feature allows constant motor speed to be maintained even when operating from a varying supply voltage such as a discharging battery. The DRV8830 uses a pulse-width modulation (PWM) technique instead of a linear circuit to minimize current consumption and maximize battery life.
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DRV8830 SLVSAB2F – MAY 2010 – REVISED FEBRUARY 2012 www.ti.com Voltage Setting (VSET DAC) The DRV8830 includes an internal reference voltage that is connected to a DAC. This DAC generates a voltage which is used to set the PWM regulated output voltage as described above. The DAC is controlled by the VSET bits from the serial interface. The commanded output voltage is as follows: VSET[5..0] Output Voltage VSET[5..0] Output Voltage 0x00h Reserved 0x20h 2.57 0x01h Reserved 0x21h 2.
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DRV8830 SLVSAB2F – MAY 2010 – REVISED FEBRUARY 2012 www.ti.com Current Limit A current limit circuit is provided to protect the system in the event of an overcurrent condition, such as what would be encountered if driving a DC motor at start-up or with an abnormal mechanical load (stall condition). The motor current is sensed by monitoring the voltage across an external sense resistor.
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DRV8830 SLVSAB2F – MAY 2010 – REVISED FEBRUARY 2012 www.ti.com I2C-Compatible Serial Interface The I2C interface allows control and monitoring of the DRV8830 by a microcontroller. I2C is a two-wire serial interface developed by Philips Semiconductor (see I2C – Bus Specification, Version 2.1, January 2000). The bus consists of a data line (SDA) and a clock line (SCL) with off-chip pull-up resistors. When the bus is idle, both SDA and SCL lines are pulled high.
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DRV8830 SLVSAB2F – MAY 2010 – REVISED FEBRUARY 2012 www.ti.com 1 1 (An) (As) (Dn+1) Sub Address Data Data ACK STOP Slave Address ACK W ACK START 0 (Dn) ACK S Figure 8.
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DRV8830 SLVSAB2F – MAY 2010 – REVISED FEBRUARY 2012 www.ti.com THERMAL INFORMATION Thermal Protection The DRV8830 has thermal shutdown (TSD) as described above. If the die temperature exceeds approximately 160°C, the device will be disabled until the temperature drops to a safe level. Any tendency of the device to enter TSD is an indication of either excessive power dissipation, insufficient heatsinking, or too high an ambient temperature.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant DRV8830DRCR SON DRC 10 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 DRV8830DRCT SON DRC 10 250 180.0 12.4 3.3 3.3 1.1 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DRV8830DRCR SON DRC 10 3000 367.0 367.0 35.0 DRV8830DRCT SON DRC 10 250 210.0 185.0 35.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.