Datasheet

DS26C32AM, DS26C32AT
www.ti.com
SNLS382C JUNE 1998REVISED APRIL 2013
DS26C32AT/DS26C32AM Quad Differential Line Receiver
Check for Samples: DS26C32AM, DS26C32AT
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FEATURES
DESCRIPTION
The DS26C32A is a quad differential line receiver
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CMOS Design for Low Power
designed to meet the RS-422, RS-423, and Federal
±0.2V Sensitivity over Input Common Mode
Standards 1020 and 1030 for balanced and
Voltage Range
unbalanced digital data transmission, while retaining
Typical Propagation Delays: 19 ns
the low power characteristics of CMOS.
Typical Input hysteresis: 60 mV
The DS26C32A has an input sensitivity of 200 mV
over the common mode input voltage range of ±7V.
Inputs Won't Load Line When V
CC
= 0V
The DS26C32A features internal pull-up and pull-
Meets the Requirements of EIA Standard RS-
down resistors which prevent output oscillation on
422
unused channels.
TRI-STATE Outputs for Connection to System
The DS26C32A provides an enable and disable
Buses
function common to all four receivers. It also features
Available in Surface Mount
TRI-STATE outputs with 6 mA source and sink
Mil-Std-883C Compliant
capability. This product is pin compatible with the
DS26LS32A and the AM26LS32.
Logic Diagram
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PRODUCTION DATA information is current as of publication date.
Copyright © 1998–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

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