Datasheet

DS3486
www.ti.com
SNLS354D MAY 1998REVISED APRIL 2013
DS3486 Quad RS-422, RS-423 Line Receiver
Check for Samples: DS3486
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FEATURES
DESCRIPTION
Texas Instruments' quad RS-422, RS-423 receiver
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Four Independent Receivers
features four independent receivers which comply
TRI-STATE Outputs
with EIA Standards for the electrical characteristics of
Internal Hysteresis 140 mV (typ)
balanced/unbalanced voltage digital interface circuits.
Receiver outputs are 74LS compatible, TRI-STATE
Fast Propagation Times 19 ns (typ)
structures which are forced to a high impedance state
TTL Compatible Outputs
when the appropriate output control pin reaches a
5V Supply
logic zero condition. A PNP device buffers each
output control pin to assure minimum loading for
Pin Compatible and Interchangeable with
either logic one or logic zero inputs. In addition, each
MC3486
receiver has internal hysteresis circuitry to improve
noise margin and discourage output instability for
slowly changing input waveforms.
Block and Connection Diagrams
Figure 1. Dual-In-Line Package
Top View
D-16 (SOIC) Package or NFG0016E (PDIP)
Package
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PRODUCTION DATA information is current as of publication date.
Copyright © 1998–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

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