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DS34C86T

www.ti.com

SNLS379C –MAY 1998–REVISED APRIL 2013

DS34C86T Quad CMOS Differential Line Receiver

Check for Samples: DS34C86T

FEATURES

DESCRIPTION

The DS34C86T is a quad differential line receiver

• CMOS Design for Low Power

designed to meet the RS-422, RS-423, and Federal

• ±0.2V Sensitivity Over the Input Common

Standards 1020 and 1030 for balanced and

Mode Voltage Range

unbalanced digital data transmission, while retaining

• Typical Propagation Delays: 19 ns

the low power characteristics of CMOS.

• Typical Input Hysteresis: 60 mV

The DS34C86T has an input sensitivity of 200 mV

over the common mode input voltage range of ±7V.

• Inputs Won't Load Line when V

= 0V

Hysteresis is provided to improve noise margin and

• Meets the Requirements of EIA Standard RS-

discourage output instability for slowly changing input

422

waveforms.

• TRI-STATE Outputs for System Bus

The DS34C86T features internal pull-up and pull-

Compatibility

down resistors which prevent output oscillation on

• Available in Surface Mount

unused channels.

• Open Input Failsafe Feature, Output High for

Separate enable pins allow independent control of

Open Input

receiver pairs. The TRI-STATE outputs have 6 mA

source and sink capability. The DS34C86T is pin

compatible with the DS3486.

Logic Diagram

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (13 pages)

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DS34C86T www.ti.com SNLS379C – MAY 1998 – REVISED APRIL 2013 DS34C86T Quad CMOS Differential Line Receiver Check for Samples: DS34C86T FEATURES DESCRIPTION • • The DS34C86T is a quad differential line receiver designed to meet the RS-422, RS-423, and Federal Standards 1020 and 1030 for balanced and unbalanced digital data transmission, while retaining the low power characteristics of CMOS. 1 2 • • • • • • • CMOS Design for Low Power ±0.
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DS34C86T SNLS379C – MAY 1998 – REVISED APRIL 2013 www.ti.com Connection Diagram Top View Figure 1. PDIP Package See Package Numbers D0016A or NFG0016E Truth Table (1) (1) Enable Input L X Output Z H VID ≥ VTH (Max) H H VID ≤ VTH (Min) L H Open* H Open, not terminated. Z = TRI-STATE These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
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DS34C86T www.ti.com SNLS379C – MAY 1998 – REVISED APRIL 2013 Operating Conditions Min Max Supply Voltage (VCC) 4.50 5.50 V Operating Temperature Range (TA) −40 +85 °C 500 ns Enable Input Rise or Fall Times Unit DC Electrical Characteristics (1) VCC = 5V ±10% (unless otherwise specified) Parameter VTH RIN Test Conditions Minimum Differential VOUT = V OH or VOL Input Voltage −7V < VCM< +7V Input Resistance VIN = −7V, +7V Min Typ Max Units −200 35 +200 mV 5.0 6.
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DS34C86T SNLS379C – MAY 1998 – REVISED APRIL 2013 www.ti.
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DS34C86T www.ti.com SNLS379C – MAY 1998 – REVISED APRIL 2013 Figure 4. TRI-STATE Output Enable and Disable Waveforms AC Test Circuits and Switching Time Waveforms Input Pulse Characteristics: tTLH = tTHL = 6 ns (10% to 90%) PRR = 1 MHz, 50% duty cycle Figure 5.
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DS34C86T SNLS379C – MAY 1998 – REVISED APRIL 2013 www.ti.com 1.5V for tPHZ and tPLZ −1.5V for tPLZ and tPZL Input Pulse Characteristics: tTLH = tTHL = 6 ns (10% to 90%) PRR = 1 MHz, 50% duty cycle tPLZ tPHZ tPZH tPZL Figure 6.
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DS34C86T www.ti.com SNLS379C – MAY 1998 – REVISED APRIL 2013 REVISION HISTORY Changes from Revision B (April 2013) to Revision C • Page Changed layout of National Data Sheet to TI format ............................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
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PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant DS34C86TMX SOIC D 16 2500 330.0 16.4 6.5 10.3 2.3 8.0 16.0 Q1 DS34C86TMX/NOPB SOIC D 16 2500 330.0 16.4 6.5 10.3 2.3 8.0 16.
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PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DS34C86TMX SOIC D 16 2500 367.0 367.0 35.0 DS34C86TMX/NOPB SOIC D 16 2500 367.0 367.0 35.
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