Datasheet

DS90C383B
www.ti.com SNLS177G –APRIL 2004–REVISED APRIL 2013
Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz
Check for Samples: DS90C383B
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FEATURES
• PLL requires no external components
• Compatible with TIA/EIA-644 LVDS standard
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• No special start-up sequence required
between clock/data and /PD pins. Input signal
• Low profile 56-lead TSSOP package
(clock and data) can be applied either before
• Improved replacement for:
or after the device is powered
– SN75LVDS83, DS90C383A
• Support Spread Spectrum Clocking up to
100kHz frequency modulation and deviations
DESCRIPTION
of ±2.5% center spread or -5% down spread
The DS90C383B transmitter converts 28 bits of
• "Input Clock Detection" feature will pull all
CMOS/TTL data into four LVDS (Low Voltage
LVDS pairs to logic low when input clock is Differential Signaling) data streams. A phase-locked
transmit clock is transmitted in parallel with the data
missing and when /PD pin is logic high
streams over a fifth LVDS link. Every cycle of the
• 18 to 68 MHz shift clock support
transmit clock 28 bits of input data are sampled and
• Best-in-Class Setup and Hold Times on
transmitted. At a transmit clock frequency of 65 MHz,
TxINPUTs
24 bits of RGB data and 3 bits of LCD timing and
control data (FPLINE, FPFRAME, DRDY) are
• Tx power consumption < 130 mW (typ) at
transmitted at a rate of 455 Mbps per LVDS data
65MHz Grayscale
channel. Using a 65 MHz clock, the data throughput
• 40% Less Power Dissipation than BiCMOS
is 227 Mbytes/sec. The DS90C383B transmitter can
Alternatives
be programmed for Rising edge strobe or Falling
• Tx Power-down mode < 60μW (typ)
edge strobe through a dedicated pin. A Rising edge
or Falling edge strobe transmitter will interoperate
• Supports VGA, SVGA, XGA and Dual Pixel
with a Falling edge strobe Receiver (DS90CF386)
SXGA.
without any translation logic.
• Narrow bus reduces cable size and cost
This chipset is an ideal means to solve EMI and
• Up to 1.8 Gbps throughput
cable size problems associated with wide, high speed
• Up to 227 Megabytes/sec bandwidth
TTL interfaces.
• 345 mV (typ) swing LVDS devices for low EMI
Block Diagram
Figure 1. DS90C383B
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