Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsInterface ICsInterface IC - buffer amplifiers, repeaters LVDS 1.5 GBit/s TQFP 48

FPGA or ASIC

LVDS I/O

Cable or Backplane

FPGA or ASIC

LVDS I/O

DS90LV004

www.ti.com

SNLS190P –APRIL 2005–REVISED APRIL 2013

DS90LV004 4-Channel LVDS Buffer/Repeater with Pre-Emphasis

Check for Samples: DS90LV004

FEATURES

DESCRIPTION

The DS90LV004 is a four channel 1.5 Gbps LVDS

• 1.5 Gbps data rate per channel

buffer/repeater. High speed data paths and flow-

• Configurable pre-emphasis drives lossy

through pinout minimize internal device jitter and

backplanes and cables

simplify board layout, while configurable pre-

• Low output skew and jitter

emphasis overcomes ISI jitter effects from lossy

backplanes and cables. The differential inputs

• LVDS/CML/LVPECL compatible input, LVDS

interface to LVDS, and Bus LVDS signals such as

output

those on TI's 10-, 16-, and 18- bit Bus LVDS SerDes,

• On-chip 100Ω input and output termination

as well as CML and LVPECL. The differential inputs

• 12 kV ESD protection on LVDS outputs

and outputs are internally terminated with a 100Ω

resistor to improve performance and minimize board

• Single 3.3V supply

space. The repeater function is especially useful for

• Very low power consumption

boosting signals for longer distance transmission over

• Industrial -40 to +85°C temperature range

lossy cables and backplanes.

• Small TQFP Package Footprint

• Evaluation Kit Available

• See SCAN90004 for JTAG-enabled version

Typical Application

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2TRI-STATE is a registered trademark of National Semiconductor Corporation.

3All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (14 pages)

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DS90LV004 www.ti.com SNLS190P – APRIL 2005 – REVISED APRIL 2013 DS90LV004 4-Channel LVDS Buffer/Repeater with Pre-Emphasis Check for Samples: DS90LV004 FEATURES DESCRIPTION • • The DS90LV004 is a four channel 1.5 Gbps LVDS buffer/repeater. High speed data paths and flowthrough pinout minimize internal device jitter and simplify board layout, while configurable preemphasis overcomes ISI jitter effects from lossy backplanes and cables.
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DS90LV004 SNLS190P – APRIL 2005 – REVISED APRIL 2013 www.ti.com Block and Connection Diagrams PEM0 PEM1 PWDN Pre-emphasis and Control IN0+ OUT0+ IN0- OUT0- IN1+ OUT1+ IN1- OUT1- IN2+ OUT2+ IN2- OUT2- IN3+ OUT3+ IN3- OUT3- GND GND OUT3- OUT3+ OUT2- OUT2+ GND GND OUT1- OUT1+ OUT0- OUT0+ Figure 1.
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DS90LV004 www.ti.com SNLS190P – APRIL 2005 – REVISED APRIL 2013 Pin Descriptions Pin Name TQFP Pin Number I/O, Type Description DIFFERENTIAL INPUTS IN0+ IN0− 13 14 I, LVDS Channel 0 inverting and non-inverting differential inputs. IN1+ IN1− 15 16 I, LVDS Channel 1 inverting and non-inverting differential inputs. IN2+ IN2− 19 20 I, LVDS Channel 2 inverting and non-inverting differential inputs. IN3+ IN3− 21 22 I, LVDS Channel 3 inverting and non-inverting differential inputs.
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DS90LV004 SNLS190P – APRIL 2005 – REVISED APRIL 2013 Absolute Maximum Ratings www.ti.com (1) Supply Voltage (VDD) −0.3V to +4.0V CMOS Input Voltage −0.3V to (VDD+0.3V) LVDS Input Voltage (2) −0.3V to (VDD+0.3V) −0.3V to (VDD+0.3V) LVDS Output Voltage LVDS Output Short Circuit Current -90 mA Junction Temperature +150°C Storage Temperature −65°C to +150°C Lead Temperature (Solder, 4sec) 260°C Max Pkg Power Capacity @ 25°C 1.
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DS90LV004 www.ti.com SNLS190P – APRIL 2005 – REVISED APRIL 2013 Electrical Characteristics (continued) Over recommended operating supply and temperature ranges unless other specified. Symbol Parameter Conditions Min Typ (1) 0.05 Max 3.40 Units VCMR Common Mode Voltage Range VID = 150 mV, VDD = 3.45V CIN2 Input Capacitance IN+ or IN− to VSS IIN Input Current VIN = 3.45V, VDD = VDDMAX −10 +10 µA VIN = 0V, VDD = VDDMAX −10 +10 µA 600 mV 35 mV 1.475 V 35 mV −90 mA 3.
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DS90LV004 SNLS190P – APRIL 2005 – REVISED APRIL 2013 www.ti.com FEATURE DESCRIPTIONS INTERNAL TERMINATIONS The DS90LV004 has integrated termination resistors on both the input and outputs. The inputs have a 100Ω resistor across the differential pair, placing the receiver termination as close as possible to the input stage of the device.
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DS90LV004 www.ti.com SNLS190P – APRIL 2005 – REVISED APRIL 2013 LVDS Driver DS90LV004 Receiver 100: Differential T-Line OUT+ IN+ 100: IN- OUT- Figure 3. Typical LVDS Driver DC-Coupled Interface to DS90LV004 Input CML3.3V or CML2.5V Driver VCC 50: DS90LV004 Receiver 100: Differential T-Line 50: OUT+ IN+ 100: IN- OUT- Figure 4. Typical CML Driver DC-Coupled Interface to DS90LV004 Input LVPECL Driver OUT+ 100: Differential T-Line LVDS Receiver IN+ 100: OUT150-250: IN150-250: Figure 5.
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DS90LV004 SNLS190P – APRIL 2005 – REVISED APRIL 2013 DS90LV004 Driver www.ti.com Differential Receiver 100: Differential T-Line OUT+ IN+ CML or LVPECL or LVDS 100: 100: IN- OUT- Figure 6.
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DS90LV004 www.ti.com SNLS190P – APRIL 2005 – REVISED APRIL 2013 TYPICAL PERFORMANCE CHARACTERISTICS Power Supply Current vs. Bit Data Rate 120 350 Clock, Max PRE 300 100 VCM = 0.25V PRBS-23, Max PRE TOTAL JITTER - tJ (ps) POWER SUPPLY CURRENT (mA) Total Jitter (TJ) vs. Bit Data Rate 250 200 150 Clock, 0% PRE 100 PRBS-23, 0% PRE 80 VCM = 2.4V 60 VCM = 1.2V 40 20 50 VCM = 0.5V VCM = 3.05V 0 0 0 0.25 0.5 0.75 1.0 1.25 1.5 0 0.5 BIT DATA RATE (Gbps) 1.0 1.5 2.
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DS90LV004 SNLS190P – APRIL 2005 – REVISED APRIL 2013 www.ti.com REVISION HISTORY Changes from Revision O (April 2013) to Revision P • 10 Page Changed layout of National Data Sheet to TI format ............................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
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MECHANICAL DATA MTQF019A – JANUARY 1995 – REVISED JANUARY 1998 PFB (S-PQFP-G48) PLASTIC QUAD FLATPACK 0,27 0,17 0,50 36 0,08 M 25 37 24 48 13 0,13 NOM 1 12 5,50 TYP 7,20 SQ 6,80 9,20 SQ 8,80 Gage Plane 0,25 0,05 MIN 0°– 7° 1,05 0,95 Seating Plane 0,75 0,45 0,08 1,20 MAX 4073176 / B 10/96 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C.
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