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DS90LV028AQ, DS90LV028AQ-Q1

www.ti.com

SNLS299E –MAY 2008–REVISED APRIL 2013

DS90LV028AQ Automotive LVDS Dual Differential Line Receiver

Check for Samples: DS90LV028AQ, DS90LV028AQ-Q1

FEATURES

DESCRIPTION

The DS90LV028AQ is a dual CMOS differential line

• AECQ-100 Grade 1

receiver designed for applications requiring ultra low

• -40°C to +125°C Operating Temperature Range

power dissipation, low noise and high data rates. The

• >400 Mbps (200 MHz) Switching Rates

device is designed to support data rates in excess of

400 Mbps (200 MHz) utilizing Low Voltage Differential

• 50 ps Differential Skew (Typical)

Signaling (LVDS) technology.

• 0.1 ns Channel-to-Channel Skew (Typical)

The DS90LV028AQ accepts low voltage (350 mV

• 2.5 ns Maximum Propagation Delay

typical) differential input signals and translates them

• 3.3V Power Supply Design

to 3V CMOS output levels. The DS90LV028AQ has a

• Flow-Through Pinout

flow-through design for easy PCB layout.

• Power Down High Impedance on LVDS Inputs

The DS90LV028AQ and companion LVDS line driver

• Low Power design (18mW @ 3.3V static)

DS90LV027AQ provide a new alternative to high

power PECL/ECL devices for high speed point-to-

• LVDS Inputs Accept LVDS/CML/LVPECL

point interface applications.

Signals

• Conforms to ANSI/TIA/EIA-644 Standard

• Available in SOIC Package

Connection Diagram

Figure 1. SOIC

See Package Number D0008A

Functional Diagram

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (15 pages)

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DS90LV028AQ, DS90LV028AQ-Q1 www.ti.com SNLS299E – MAY 2008 – REVISED APRIL 2013 DS90LV028AQ Automotive LVDS Dual Differential Line Receiver Check for Samples: DS90LV028AQ, DS90LV028AQ-Q1 FEATURES DESCRIPTION • • • • • • • • • • • The DS90LV028AQ is a dual CMOS differential line receiver designed for applications requiring ultra low power dissipation, low noise and high data rates.
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DS90LV028AQ, DS90LV028AQ-Q1 SNLS299E – MAY 2008 – REVISED APRIL 2013 www.ti.com Truth Table INPUTS OUTPUT [RIN+] − [RIN−] ROUT VID ≥ 0.1V H VID ≤ −0.1V L These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) −0.3V to +4V Supply Voltage (VCC) Input Voltage (RIN+, RIN−) −0.3V to +3.9V −0.3V to VCC + 0.
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DS90LV028AQ, DS90LV028AQ-Q1 www.ti.com SNLS299E – MAY 2008 – REVISED APRIL 2013 Electrical Characteristics Over Supply Voltage and Operating Temperature ranges, unless otherwise specified. Symbol Parameter (1) (2) Conditions VTH Differential Input High Threshold VTL Differential Input Low Threshold IIN Input Current VCM = +1.2V, 0V, 3V VIN = +2.8V Pin Min RIN+, RIN− −100 VCC = 3.6V or 0V VIN = 0V VIN = +3.6V VOH VCC = 0V mV mV ±1 +10 μA −10 ±1 +10 μA +20 μA V IOH = −0.
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DS90LV028AQ, DS90LV028AQ-Q1 SNLS299E – MAY 2008 – REVISED APRIL 2013 www.ti.com Parameter Measurement Information Figure 2. Receiver Propagation Delay and Transition Time Test Circuit Figure 3. Receiver Propagation Delay and Transition Time Waveforms Typical Application Figure 4. Balanced System Point-to-Point Application APPLICATION INFORMATION General application guidelines and hints for LVDS drivers and receivers may be found in the following application notes: LVDS Owner's Manual at www.ti.com.
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DS90LV028AQ, DS90LV028AQ-Q1 www.ti.com SNLS299E – MAY 2008 – REVISED APRIL 2013 The DS90LV028AQ differential line receiver is capable of detecting signals as low as 100 mV, over a ±1V common-mode range centered around +1.2V. This is related to the driver offset voltage which is typically +1.2V. The driven signal is centered around this voltage and may shift ±1V around this center point.
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DS90LV028AQ, DS90LV028AQ-Q1 SNLS299E – MAY 2008 – REVISED APRIL 2013 www.ti.com INPUT FAILSAFE BIASING External pull up and pull down resistors may be used to provide enough of an offset to enable an input failsafe under open-circuit conditions. This configuration ties the positive LVDS input pin to VDD thru a pull up resistor and the negative LVDS input pin is tied to GND by a pull down resistor.
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DS90LV028AQ, DS90LV028AQ-Q1 www.ti.com SNLS299E – MAY 2008 – REVISED APRIL 2013 Typical Performance Curves Output High Voltage vs Power Supply Voltage Output Low Voltage vs Power Supply Voltage Figure 5. Figure 6. Output Short Circuit Current vs Power Supply Voltage Differential Transition Voltage vs Power Supply Voltage Figure 7. Figure 8. Power Supply Current vs Frequency Differential Propagation Delay vs Power Supply Voltage Figure 9. Figure 10.
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DS90LV028AQ, DS90LV028AQ-Q1 SNLS299E – MAY 2008 – REVISED APRIL 2013 www.ti.com Typical Performance Curves (continued) 8 Differential Propagation Delay vs Differential Input Voltage Differential Propagation Delay vs Common-Mode Voltage Figure 11. Figure 12. Transition Time vs Power Supply Voltage Differential Skew vs Power Supply Voltage Figure 13. Figure 14. Differential Propagation Delay vs Load Differential Propagation Delay vs Load Figure 15. Figure 16.
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DS90LV028AQ, DS90LV028AQ-Q1 www.ti.com SNLS299E – MAY 2008 – REVISED APRIL 2013 Typical Performance Curves (continued) Transition Time vs Load Transition Time vs Load Figure 17. Figure 18.
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DS90LV028AQ, DS90LV028AQ-Q1 SNLS299E – MAY 2008 – REVISED APRIL 2013 www.ti.com REVISION HISTORY Changes from Revision D (April 2013) to Revision E • 10 Page Changed layout of National Data Sheet to TI format ............................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 11-Oct-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device DS90LV028AQMAX/NOP B Package Package Pins Type Drawing SOIC D 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 12.4 Pack Materials-Page 1 6.5 B0 (mm) K0 (mm) P1 (mm) 5.4 2.0 8.0 W Pin1 (mm) Quadrant 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 11-Oct-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DS90LV028AQMAX/NOPB SOIC D 8 2500 367.0 367.0 35.
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