Datasheet

SDA
SCL
S
P
S
S
TART condition, or
TART repeat condition
STO conditionP
HOST
SER
or
DES
SCL
SDA
4.7k 4.7k
10 k
R
ID
SCL
SDA
To other
Devices
ID[X]
1.8V
V
DDIO
DS92LV2411, DS92LV2412
www.ti.com SNLS302C –MAY 2010–REVISED APRIL 2013
Optional Serial Bus Control
The Ser and Des may also be configured by the use of a serial control bus that is I2C protocol compatible. By
default, the I2C reg_0x00'h is set to 00'h and all configuration is set by control/strap pins. A write of 01'h to
reg_0x00'h will enable/allow configuration by registers; this will override the control/strap pins. Multiple devices
may share the serial control bus since multiple addresses are supported. See Figure 33.
The serial bus is comprised of three pins. The SCL is a Serial Bus Clock Input. The SDA is the Serial Bus Data
Input / Output signal. Both SCL and SDA signals require an external pull up resistor to V
DDIO
. For most
applications a 4.7 k pull up resistor to V
DDIO
may be used. The resistor value may be adjusted for capacitive
loading and data rate requirements. The signals are either pulled High, or driven Low.
Figure 33. Serial Control Bus Connection
The third pin is the ID[X] pin. This pin sets one of four possible device addresses. As shown in Figure 33 ,
Table 11 and Table 12 different Resistor values could be used to set different SMBUS addresses.
The Serial Bus protocol is controlled by START, START-Repeated, and STOP phases. A START occurs when
SDA transitions Low while SCL is High. A STOP occurs when SDA transition High while SCL is also HIGH. See
Figure 34
Figure 34. START and STOP Conditions
To communicate with a remote device, the host controller (master) sends the slave address and listens for a
response from the slave. This response is referred to as an acknowledge bit (ACK). If a slave on the bus is
addressed correctly, it Acknowledges (ACKs) the master by driving the SDA bus low. If the address doesn't
match a device's slave address, it Not-acknowledges (NACKs) the master by letting SDA be pulled High. ACKs
also occur on the bus when data is being transmitted. When the master is writing data, the slave ACKs after
every data byte is successfully received. When the master is reading data, the master ACKs after every data
byte is received to let the slave know it wants to receive another data byte. When the master wants to stop
reading, it NACKs after the last data byte and creates a stop condition on the bus. All communication on the bus
begins with either a Start condition or a Repeated Start condition. All communication on the bus ends with a Stop
condition. A READ is shown in Figure 35 and a WRITE is shown in Figure 36.
If the Serial Bus is not required, the three pins may be left open (NC).
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