Datasheet

Slave Address
Register Address
Data
S
0
a
c
k
a
c
k
a
c
k
P
A
0
A
1
A
2
Slave Address
Register Address Slave Address
Data
S
0
1
a
c
k
a
c
k
a
c
k
a
c
k
S P
A
0
A
1
A
2
A
1
A
2
A
0
DS92LV2411, DS92LV2412
SNLS302C –MAY 2010–REVISED APRIL 2013 www.ti.com
Table 11. ID[x] Resistor Value – DS92LV2411 Ser
Resistor Address Address
RID kΩ 7'b 8'b
0 appended
(WRITE)
0.47 7b' 110 1001 (h'69) 8b' 1101 0010 (h'D2)
2.7 7b' 110 1010 (h'6A) 8b' 1101 0100 (h'D4)
8.2 7b' 110 1011 (h'6B) 8b' 1101 0110 (h'D6)
Open 7b' 110 1110 (h'6E) 8b' 1101 1100 (h'DC)
Table 12. ID[x] Resistor Value – DS92LV2412 Des
Resistor Address Address
RID kΩ 7'b 8'b
0 appended
(WRITE)
0.47 7b' 111 0001 (h'71) 8b' 1110 0010 (h'E2)
2.7 7b' 111 0010 (h'72) 8b' 1110 0100 (h'E4)
8.2 7b' 111 0011 (h'73) 8b' 1110 0110 (h'E6)
Open 7b' 111 0110 (h'76) 8b' 1110 1100 (h'EC)
Figure 35. Serial Control Bus — READ
Figure 36. Serial Control Bus — WRITE
Table 13. SERIALIZER — Serial Bus Control Registers
ADD ADD Register Name Bit(s) R/W Default Function Description
(dec) (hex) (bin)
0 0 Ser Config 1 7 R/W 0 Reserved Reserved
6 R/W 0 Reserved Reserved
5 R/W 0 VODSEL 0: Low
1: High
4 R/W 0 RFB 0: Data latched on Falling edge of CLKIN
1: Data latched on Rising edge of CLKIN
3:2 R/W 00 CONFIG 00: Control Signal Filter Disabled
01: Control Signal Filter Enabled
10: Reserved
11: Reserved
1 R/W 0 SLEEP Note – not the same function as PowerDown
(PDB)
0: normal mode
1: Sleep Mode – Register settings retained.
0 R/W 0 REG 0: Configurations set from control pins
1: Configuration set from registers (except I2C_ID)
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