Datasheet

DS92LV2411, DS92LV2412
www.ti.com SNLS302C –MAY 2010–REVISED APRIL 2013
DS92LV2411 Serializer PIN DESCRIPTIONS
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(continued)
Pin Name Pin # I/O, Type Description
Channel-Link II — CML Serial Interface
DOUT+ 20 O, CML Non–Inverting Output.
The output must be AC Coupled with a 0.1 µF capacitor.
DOUT- 19 O, CML Inverting Output.
The output must be AC Coupled with a 0.1 µF capacitor.
Power and Ground
VDDL 7 Power Logic Power, 1.8 V ±5%
VDDP 14 Power PLL Power, 1.8 V ±5%
VDDHS 17 Power TX High Speed Logic Power, 1.8 V ±5%
VDDTX 22 Power Output Driver Power, 1.8 V ±5%
VDDIO 30 Power LVCMOS I/O Power, 1.8 V ±5% OR 3.3 V ±10%
GND DAP Ground DAP is the large metal contact at the bottom side, located at the center of the WQFN
package. Connect to the ground plane (GND) with at least 9 vias.
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