Datasheet

 
    
SLLS206J − MAY 1995 − REVISED NOVEMBER 2004
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D Single Chip With Easy Interface Between
UART and Serial-Port Connector of IBM
PC/AT and Compatibles
D Meet or Exceed the Requirements of
TIA/EIA-232-F and ITU v.28 Standards
D Designed to Support Data Rates up to
120 kbit/s
D Pinout Compatible With SN75C185 and
SN75185
description/ordering information
The GD65232 and GD75232 combine three
drivers and five receivers from the
Texas Instruments trade-standard SN75188 and
SN75189 bipolar quadruple drivers and receivers, respectively. The pinout matches the flow-through design
of the SN75C185 to decrease the part count, reduce the board space required, and allow easy interconnection
of the UART and serial-port connector of an IBM PC/AT and compatibles. The bipolar circuits and processing
of the GD65232 and GD75232 provide a rugged, low-cost solution for this function at the expense of quiescent
power and external passive components relative to the SN75C185.
The GD65232 and GD75232 comply with the requirements of the TIA/EIA-232-F and ITU (formerly CCITT) V.28
standards. These standards are for data interchange between a host computer and a peripheral at signaling
rates up to 20 kbit/s. The switching speeds of these devices are fast enough to support rates up to 120 kbit/s
with lower capacitive loads (shorter cables). Interoperability at the higher signaling rates cannot be expected
unless the designer has design control of the cable and the interface circuits at both ends. For interoperability
at signaling rates up to 120 kbit/s, use of TIA/EIA-423-B (ITU V.10) and TIA/EIA-422-B (ITU V.11) standards
is recommended.
ORDERING INFORMATION
T
A
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP (N) Tube of 20 GD65232N GD65232N
SOIC (DW)
Tube of 25 GD65232DW
GD65232
−40°C to 85°C
SOIC (DW)
Reel of 2000 GD65232DWR
GD65232
−40°C to 85°C
SSOP (DB) Reel of 2000 GD65232DBR GD65232
TSSOP (PW)
Tube of 70 GD65232PW
GD65232
TSSOP (PW)
Reel of 2000 GD65232PWR
GD65232
PDIP (N) Tube of 20 GD75232N GD75232N
SOIC (DW)
Tube of 25 GD75232DW
GD75232
0°C to 70°C
SOIC (DW)
Reel of 2000 GD75232DWR
GD75232
0°C to 70°C
SSOP (DB) Reel of 2000 GD75232DBR GD75232
TSSOP (PW)
Tube of 70 GD75232PW
GD75232
TSSOP (PW)
Reel of 2000 GD75232PWR
GD75232
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Copyright 2004, Texas Instruments Incorporated
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V
DD
RA1
RA2
RA3
DY1
DY2
RA4
DY3
RA5
V
SS
V
CC
RY1
RY2
RY3
DA1
DA2
RY4
DA3
RY5
GND
GD65232, GD75232 . . . DB, DW, N, OR PW PACKAGE
(TOP VIEW)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
IBM is a trademark of International Business Machines Corporation.

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