Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - current control/management Current monitoring QFN 16 (3x3)

Power Register

Current Register

I C

Interface

Voltage Register

INA230

GND

BUS

ADC

ALERT

SDA

SCL

0.1 F

BYPASS

High-

Side

Shunt

Low-

Side

Shunt

Load

Alert Register

(Supply Voltage)

Power Supply

(0 V to 28 V)

INA230

www.ti.com

SBOS601 –FEBRUARY 2012

High- or Low-Side Measurement,

Bidirectional CURRENT/POWER MONITOR with I

C™ Interface

Check for Samples: INA230

FEATURES

DESCRIPTION

The INA230 is a current-shunt and power monitor

• Bus Voltage Sensing From 0 V to +28 V

with an I

C interface that features 16 programmable

• High- or Low-Side Sensing

addresses. The INA230 monitors both shunt voltage

• Current, Voltage, and Power Reporting

drops and bus supply voltage. Programmable

calibration value, conversion times, and averaging,

• High Accuracy:

combined with an internal multiplier, enable direct

– 0.5% Gain Error (Max)

readouts of current in amperes and power in watts.

– 50-μV Offset (Max)

The INA230 senses current on buses that vary from 0

• Configurable Averaging Options

V to +28 V, with the device powered from a single

• Programmable Alert Threshold

+2.7 V to +5.5 V supply, drawing 330 μA (typical) of

supply current. The INA230 is specified over the

• Power Supply Operation: 2.7 V to 5.5 V

operating temperature range of –40°C to +125°C.

• Package: 3-mm x 3-mm, 16-Pin QFN

Summary of content (35 pages)

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INA230 SBOS601 – FEBRUARY 2012 www.ti.com High- or Low-Side Measurement, Bidirectional CURRENT/POWER MONITOR with I2C™ Interface Check for Samples: INA230 FEATURES DESCRIPTION • • • • The INA230 is a current-shunt and power monitor with an I2C interface that features 16 programmable addresses. The INA230 monitors both shunt voltage drops and bus supply voltage.
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INA230 SBOS601 – FEBRUARY 2012 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
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INA230 SBOS601 – FEBRUARY 2012 www.ti.com ELECTRICAL CHARACTERISTICS At TA = +25°C, VS = +3.3 V, VIN+ = 12 V, VSENSE = (VIN+ – VIN–) = 0 mV, and VBUS = 12 V, unless otherwise noted. INA230 PARAMETER CONDITIONS MIN TYP MAX UNIT SHUNT INPUT Shunt voltage input range CMR Common-mode rejection VOS Shunt offset voltage, RTI (1) PSRR vs power supply -81.92 VIN+ = 0 V to +28 V 100 81.9175 120 mV dB ±10 ±50 μV TA = –40°C to +125°C 0.1 0.5 μV/°C VS = +2.7 V to +5.
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INA230 SBOS601 – FEBRUARY 2012 www.ti.com ELECTRICAL CHARACTERISTICS (continued) At TA = +25°C, VS = +3.3 V, VIN+ = 12 V, VSENSE = (VIN+ – VIN–) = 0 mV, and VBUS = 12 V, unless otherwise noted. INA230 PARAMETER CONDITIONS MIN TYP MAX UNIT POWER SUPPLY Operating supply range +2.7 Quiescent current Power-Down mode Power-on reset threshold +5.5 V 330 420 μA 0.
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INA230 SBOS601 – FEBRUARY 2012 www.ti.com PIN CONFIGURATIONS NC NC NC IN+ 16 15 14 13 RGT PACKAGE QFN-16 (TOP VIEW) ALERT 3 10 GND SDA 4 9 VS+ 8 BUS NC 11 7 2 NC A0 6 IN- NC 12 5 1 SCL A1 PIN DESCRIPTIONS PIN NAME NO. ANALOG/DIGITAL INPUT/OUTPUT DESCRIPTION A0 2 Digital input Address pin. Connect to GND, SCL, SDA, or VS. Table 7 shows pin settings and corresponding addresses. A1 1 Digital input Address pin. Connect to GND, SCL, SDA, or VS.
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INA230 SBOS601 – FEBRUARY 2012 www.ti.com REGISTER BLOCK DIAGRAM Power (1) Bus Voltage (1) ´ Shunt Voltage Channel Current (1) ADC Bus Voltage Channel Calibration (2) ´ Shunt Voltage (1) Data Registers (1) Read-only (2) Read/write Figure 1.
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INA230 SBOS601 – FEBRUARY 2012 www.ti.com TYPICAL CHARACTERISTICS At TA = +25°C, VS = +3.3 V, VIN+ = 12 V, VSENSE = (VIN+ – VIN–) = 0 mV, and VBUS = 12 V, unless otherwise noted. SHUNT INPUT OFFSET VOLTAGE PRODUCTION DISTRIBUTION FREQUENCY RESPONSE 0 −10 Population Gain (dB) −20 −30 −40 −50 1 10 100 1k Frequency (Hz) 10k 100k −50 −45 −40 −35 −30 −25 −20 −15 −10 −5 0 5 10 15 20 25 30 35 40 45 50 −60 G001 Input Offset Voltage (µV) Figure 3.
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INA230 SBOS601 – FEBRUARY 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = +3.3 V, VIN+ = 12 V, VSENSE = (VIN+ – VIN–) = 0 mV, and VBUS = 12 V, unless otherwise noted. SHUNT INPUT GAIN ERROR vs COMMON-MODE VOLTAGE BUS INPUT OFFSET VOLTAGE PRODUCTION DISTRIBUTION 300 200 Population Gain Error (m%) 250 150 100 50 G007 30 25 27.5 20 22.5 15 17.5 10 12.5 5 7.5 36 0 32 2.5 8 12 16 20 24 28 Common−Mode Input Voltage (V) −2.
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INA230 SBOS601 – FEBRUARY 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = +3.3 V, VIN+ = 12 V, VSENSE = (VIN+ – VIN–) = 0 mV, and VBUS = 12 V, unless otherwise noted. INPUT BIAS CURRENT vs TEMPERATURE INPUT BIAS CURRENT vs TEMPERATURE, SHUTDOWN 260 Input Bias Current − Shutdown (nA) Input Bias Current (µA) 24 22 20 18 16 −50 −25 0 25 50 Temperature (°C) 75 100 220 180 140 100 60 20 −50 125 −25 0 G013 Figure 14.
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INA230 SBOS601 – FEBRUARY 2012 www.ti.com APPLICATION INFORMATION The INA230 is a digital current shunt monitor with an I2C- and SMBus-compatible interface. This device provides digital current, voltage, and power readings necessary for accurate decision-making in precisely-controlled systems. Programmable registers allow flexible configuration for measurement resolution, as well as continuous-versus-triggered operation.
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INA230 SBOS601 – FEBRUARY 2012 www.ti.com Although the INA230 can be read at any time, and the data from the last conversion remain available, the Conversion Ready Flag bit (CVRF bit, Mask/Enable register) is provided to help coordinate single-shot or triggered conversions. The CVRF bit is set after all conversions, averaging, and multiplication operations are complete for a single cycle. The CVRF bit clears under these conditions: 1.
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INA230 SBOS601 – FEBRUARY 2012 www.ti.com Averaging and Conversion Time Considerations The INA230 has programmable conversion times for both the shunt voltage and bus voltage measurements. The conversion times for these measurements can be selected from as fast as 140 μs to as long as 8.244 ms. The conversion time settings, along with the programmable averaging mode, allow the INA230 to be configured to optimize the available timing requirements in a given application.
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INA230 SBOS601 – FEBRUARY 2012 www.ti.com Filtering and Input Considerations Measuring current is often a noisy task, and such noise can be difficult to define. The INA230 offers several options for filtering by allowing the conversion times and number of averages to be independently selected in the Configuration register. The conversion times can be independently set for the shunt voltage and bus voltage measurements to allow added flexibility in configuring the monitoring of the power-supply bus.
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INA230 SBOS601 – FEBRUARY 2012 www.ti.com ALERT PIN The INA230 has a single Alert Limit register (07h) that allows the ALERT pin to be programmed to respond to a single user-defined event or to a conversion ready notification if desired. The Mask/Enable register allows for selecton from one of the five available functions to monitor and/or set the conversion ready bit (CNVR, Mask/Enable register) to control the response of the ALERT pin.
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INA230 SBOS601 – FEBRUARY 2012 www.ti.com PROGRAMMING THE INA230 An important aspect of the INA230 is that it does not necessarily measure current or power. The INA230 measures both the differential voltage applied between the IN+ and IN– input pins and the voltage applied to the BUS pin.
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INA230 SBOS601 – FEBRUARY 2012 www.ti.com CONFIGURE/MEASURE/CALCULATE EXAMPLE In this example, shown in Figure 23, a nominal 10-A load creates a differential voltage of 20 mV across a 2-mΩ shunt resistor. The bus voltage for the INA230 is measured at the external BUS input pin; in this example, BUS is connected to the IN– pin to measure the voltage level delivered to the load. For this example, the BUS pin measures less than 12 V because the voltage at the IN– pin is 11.
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INA230 SBOS601 – FEBRUARY 2012 www.ti.com The Power register (03h) is then calculated by multiplying the decimal value of the Current register, 10000, by the decimal value of the Bus Voltage register, 9584, and then dividing by 20,000, as defined in Equation 4. For this example, the result for the Power register is 12B8h, or a decimal equivalent of 4792. Multiplying this result by the power LSB (25 times the [1 × 10–3 Current_LSB]) results in a power calculation of (4792 × 25 mW/bit), or 119.8 W.
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INA230 SBOS601 – FEBRUARY 2012 www.ti.com Simple Current Shunt Monitor Usage (No Programming Necessary) The INA230 can be used without any programming if it is only necessary to read a shunt voltage drop and bus voltage with the default power-on reset configuration and continuous conversion of shunt and bus voltage.
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INA230 SBOS601 – FEBRUARY 2012 www.ti.com REGISTER DETAILS All 16-bit INA230 registers are two 8-bit bytes via the I2C interface. Configuration Register (00h, Read/Write) BIT # D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 BIT NAME RST — — — AVG2 AVG1 AVG0 VBUSCT2 VBUSCT1 VBUSCT0 VSHCT2 VSHCT1 VSHCT0 MODE3 MODE2 MODE1 POR VALUE 0 1 0 0 0 0 0 1 0 0 1 0 0 1 1 1 The Configuration register settings control the operating modes for the INA230.
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INA230 SBOS601 – FEBRUARY 2012 www.ti.com VBUS CT: Bus Voltage Conversion Time Bits 6–8 Sets the conversion time for the bus voltage measurement. Table 4 shows the VBUS CT bit options and related conversion times for each bit. Table 4. VBUS CT Bit Settings [8:6] (1) (1) VBUS CT2 (D8) VBUS CT1 (D7) VBUS CT0 (D6) CONVERSION TIME 0 0 0 140 µs 0 0 1 204 µs 0 1 0 332 µs 0 1 1 588 µs 1 0 0 1.1 ms 1 0 1 2.116 ms 1 1 0 4.156 ms 1 1 1 8.244 ms Shaded values are default.
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INA230 SBOS601 – FEBRUARY 2012 www.ti.com DATA OUTPUT REGISTERS Shunt Voltage Register (01h, Read-Only) The Shunt Voltage register stores the current shunt voltage reading, VSHUNT. Negative numbers are represented in twos complement format. Generate the twos complement of a negative number by complementing the absolute value binary number and adding 1. Extend the sign, denoting a negative number by setting the MSB = '1'. Example: For a value of VSHUNT = –80 mV: 1. Take the absolute value: 80mV 2.
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INA230 SBOS601 – FEBRUARY 2012 www.ti.com Current Register (04h, Read-Only) If averaging is enabled, this register displays the averaged value.
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INA230 SBOS601 – FEBRUARY 2012 www.ti.com AFF: Alert Function Flag Bit 4 Although only one alert function at a time can be monitored at the ALERT pin, the Conversion Ready bit (CNVR, bit 10) can also be enabled to assert the ALERT pin. Reading the Alert Function Flag bit after an alert can help determine if the alert function was the source of the alert. When the Alert Latch Enable bit is set to Latch mode, the Alert Function Flag bit clears only when the Mask/Enable register is read.
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INA230 SBOS601 – FEBRUARY 2012 www.ti.com Data transfer is then initiated and eight bits of data are sent, followed by an ACK. During data transfer, SDA must remain stable while SCL is high. Any change in SDA while SCL is high is interpreted as a start or stop condition. Once all data have been transferred, the master generates a stop condition, indicated by pulling SDA from low to high while SCL is high. The INA230 includes a 28-ms timeout on its interface to prevent locking up the bus.
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INA230 SBOS601 – FEBRUARY 2012 www.ti.com WRITING TO/READING FROM THE INA230 Accessing a specific register on the INA230 is accomplished by writing the appropriate value to the register pointer. Refer to Table 2 for a complete list of registers and corresponding addresses. The value for the register pointer (shown in Figure 27) is the first byte transferred after the slave address byte with the R/W bit low. Every write operation to the INA230 requires a value for the register pointer.
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INA230 SBOS601 – FEBRUARY 2012 www.ti.com Figure 26 shows the timing diagram for the SMBus alert response operation. Figure 27 illustrates a typical register pointer configuration. ALERT 1 9 1 9 SCL SDA 0 0 0 1 1 0 0 R/W Start By Master 1 0 0 A2 ACK By INA230 A1 A0 0 From INA230 Frame 1 SMBus ALERT Response Address Byte (1) A3 Frame 2 Slave Address Byte NACK By Master Stop By Master (1) The value of the slave address byte is determined by the settings of the A0 and A1 pins.
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INA230 SBOS601 – FEBRUARY 2012 www.ti.com High-Speed I2C Mode When the bus is idle, both the SDA and SCL lines are pulled high by the pull-up devices. The master generates a start condition followed by a valid serial byte containing High-Speed (HS) master code 00001XXX. This transmission is made in fast (400 kHz) or standard (100 kHz) (F/S) mode at no more than 400 kHz. The INA230 does not acknowledge the HS master code, but does recognize it and switches its internal filters to support 3.4-MHz operation.
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INA230 SBOS601 – FEBRUARY 2012 www.ti.com SMBus Alert Response The INA230 is designed to respond to the SMBus alert response address. The SMBus alert response provides a quick fault identification for simple slave devices. When an alert occurs, the master can broadcast the alert response slave address (0001 100) with the Read/Write bit set high.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant INA230AIRGTR QFN RGT 16 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 INA230AIRGTT QFN RGT 16 250 180.0 12.4 3.3 3.3 1.1 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) INA230AIRGTR QFN RGT 16 3000 367.0 367.0 35.0 INA230AIRGTT QFN RGT 16 250 210.0 185.0 35.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.