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LF411-N

www.ti.com

SNOSBH6D –APRIL 1998–REVISED MARCH 2013

LF411 Low Offset, Low Drift JFET Input Operational Amplifier

Check for Samples: LF411-N

FEATURES

DESCRIPTION

These devices are low cost, high speed, JFET input

• Internally trimmed offset voltage: 0.5 mV(max)

operational amplifiers with very low input offset

• Input offset voltage drift: 10 μV/°C(max)

voltage and specified input offset voltage drift. They

• Low input bias current: 50 pA

require low supply current yet maintain a large gain

bandwidth product and fast slew rate. In addition, well

• Low input noise current: 0.01 pA/√Hz

matched high voltage JFET input devices provide

• Wide gain bandwidth: 3 MHz(min)

very low input bias and offset currents. The LF411 is

• High slew rate: 10V/μs(min)

pin compatible with the standard LM741 allowing

designers to immediately upgrade the overall

• Low supply current: 1.8 mA

performance of existing designs.

• High input impedance: 10

These amplifiers may be used in applications such as

• Low total harmonic distortion: ≤0.02%

high speed integrators, fast D/A converters, sample

• Low 1/f noise corner: 50 Hz

and hold circuits and many other circuits requiring low

• Fast settling time to 0.01%: 2 μs

input offset voltage and drift, low input bias current,

high input impedance, high slew rate and wide

bandwidth.

Typical Connection

Figure 1.

Connection Diagram

Note: Pin 4 connected to case.

Figure 2. TO – Top View

See Package Number NEV0008A

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2BI-FET II is a trademark of dcl_owner.

3All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (16 pages)

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LF411-N www.ti.com SNOSBH6D – APRIL 1998 – REVISED MARCH 2013 LF411 Low Offset, Low Drift JFET Input Operational Amplifier Check for Samples: LF411-N FEATURES DESCRIPTION • • • • • • • • • • • These devices are low cost, high speed, JFET input operational amplifiers with very low input offset voltage and specified input offset voltage drift. They require low supply current yet maintain a large gain bandwidth product and fast slew rate.
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LF411-N SNOSBH6D – APRIL 1998 – REVISED MARCH 2013 www.ti.com Figure 3. PDIP – Top View See Package Number P0008E These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
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LF411-N www.ti.com SNOSBH6D – APRIL 1998 – REVISED MARCH 2013 DC Electrical Characteristics Symbol (1) (2) Parameter VOS Input Offset Voltage RS=10 kΩ, TA=25°C ΔVOS/ΔT Average TC of Input Offset Voltage RS=10 kΩ IOS Input Offset Current LF411A Conditions VS=±15V Min Max 0.3 0.5 (2) (4) VS=±15V Tj=25°C 25 100 25 2 (2) (4) 25 Tj=25°C 50 Tj=125°C 50 1012 nA pA 4 nA 50 nA 200 V/mV ±12 ±13.5 ±12 ±13.5 V ±16 +19.5 ±11 +14.5 V −11.
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LF411-N SNOSBH6D – APRIL 1998 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics 4 Input Bias Current Input Bias Current Figure 4. Figure 5. Supply Current Positive Common-Mode Input Voltage Limit Figure 6. Figure 7. Negative Common-Mode Input Voltage Limit Positive Current Limit Figure 8. Figure 9.
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LF411-N www.ti.com SNOSBH6D – APRIL 1998 – REVISED MARCH 2013 Typical Performance Characteristics (continued) Negative Current Limit Output Voltage Swing Figure 10. Figure 11. Output Voltage Swing Gain Bandwidth Figure 12. Figure 13. Bode Plot Slew Rate Figure 14. Figure 15.
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LF411-N SNOSBH6D – APRIL 1998 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) 6 Distortion vs Frequency Undistorted Output Voltage Swing Figure 16. Figure 17. Open Loop Frequency Response Common-Mode Rejection Ratio Figure 18. Figure 19. Power Supply Rejection Ratio Equivalent Input Noise Voltage Figure 20. Figure 21.
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LF411-N www.ti.com SNOSBH6D – APRIL 1998 – REVISED MARCH 2013 Typical Performance Characteristics (continued) Open Loop Voltage Gain Output Impedance Figure 22. Figure 23. Inverter Settling Time Figure 24. PULSE RESPONSE (RL=2 KΩ, CL10 PF) Figure 25. Small Signal Inverting Figure 26.
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LF411-N SNOSBH6D – APRIL 1998 – REVISED MARCH 2013 www.ti.com Figure 27. Large Signal Inverting Figure 28. Large Signal Non-Inverting Figure 29. Current Limit (RL=100Ω) APPLICATION HINTS The LF411 series of internally trimmed JFET input op amps (BI-FET II™ ) provide very low input offset voltage and specified input offset voltage drift. These JFETs have large reverse breakdown voltages from gate to source and drain eliminating the need for clamps across the inputs.
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LF411-N www.ti.com SNOSBH6D – APRIL 1998 – REVISED MARCH 2013 The LF411 is biased by a zener reference which allows normal circuit operation on ±4.5V power supplies. Supply voltages less than these may result in lower gain bandwidth and slew rate. The LF411 will drive a 2 kΩ load resistance to ±10V over the full temperature range.
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LF411-N SNOSBH6D – APRIL 1998 – REVISED MARCH 2013 www.ti.com where AN=1 if the AN digital input is high AN=0 if the AN digital input is low Figure 31. 10-Bit Linear DAC with No VOS Adjust Figure 32. Single Supply Analog Switch with Buffered Output SIMPLIFIED SCHEMATIC (1) Available per JM38510/11904 Figure 33.
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LF411-N www.ti.com SNOSBH6D – APRIL 1998 – REVISED MARCH 2013 DETAILED SCHEMATIC Figure 34.
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LF411-N SNOSBH6D – APRIL 1998 – REVISED MARCH 2013 www.ti.com REVISION HISTORY Changes from Revision C (March 2013) to Revision D • 12 Page Changed layout of National Data Sheet to TI format ..........................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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