Datasheet

LM1085
www.ti.com SNVS038G –JULY 1999–REVISED MARCH 2013
Figure 21. Heat sink thermal Resistance vs Area
THERMAL CONSIDERATION FOR THE DDPAK/TO-263 PACKAGE
Unlike the TO-220 package, the TO-263 package uses the printed circuit board as the heat sink to remove heat
from the device. The device dissipation is:
P
D
= OUTPUT Section Dissipation + CONTROL Section Dissipation (8)
For the LM1085IS-x.x pre-set voltage versions, the dissipation can be calculated using:
P
D
= ( (V
IN
- V
OUT
) x I
LOAD
) + ( (V
IN
- V
OUT
) x I
GND
) (9)
The LM1085IS-ADJ adjustable voltage version, the dissipation can be calculated using:
P
D
= ( (V
IN
- V
OUT
) x I
LOAD
) + ( (V
IN
- V
OUT
) x (V
REF
/ R1)) (10)
Current through the ADJ pin is sufficiently small such that any contribution to the device dissipation is so low that
it can safely be ignored.
Maximum power dissipation of the LM1085IS depends on the total thermal resistance from the silicon junction
through the package TAB (θ
JC
), into the PC board, copper traces, and other materials, and then into the
surrounding air (θ
JA
), the maximum allowed operating junction temperature (T
J(MAX)
) of 125°C, and the maximum
ambient temperature (T
A(MAX)
). The maximum power dissipation in the device is:
P
D(MAX)
= (T
J(MAX)
- T
A(MAX)
) / (θ
JA
(11)
For the LM1085IS in the DDPAK/TO-263 3-pin package, the junction-to-case thermal rating, θ
JC
, is 0.7°C/W,
where the case is the bottom of the package at the center of the TAB. Typical junction-to-ambient thermal
performance for the LM1085IS, using the JESD51 standards, is summarized in the following table:
BOARD TYPE THERMAL VIAS θ
JA
JEDEC 2-Layer
None 81 °C/W
(per JESD 51-3)
0 59 °C/W
2 31 °C/W
JEDEC 4-Layer
4 27 °C/W
(per JESD 51-7)
8 24 °C/W
12 23 °C/W
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