Datasheet

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LM1881

www.ti.com

SNLS384F –FEBRUARY 1995–REVISED MARCH 2013

LM1881 Video Sync Separator

Check for Samples: LM1881

FEATURES

DESCRIPTION

The LM1881 Video sync separator extracts timing

• AC Coupled Composite Input Signal

information including composite and vertical sync,

• >10 kΩ Input Resistance

burst/back porch timing, and odd/even field

• <10 mA Power Supply Drain Current

information from standard negative going sync NTSC,

PAL

(1)

and SECAM video signals with amplitude from

• Composite Sync and Vertical Outputs

0.5V to 2V p-p. The integrated circuit is also capable

• Odd/Even Field Output

of providing sync separation for non-standard, faster

• Burst Gate/Back Porch Output

horizontal rate video signals. The vertical output is

produced on the rising edge of the first serration in

• Horizontal Scan Rates to 150 kHz

the vertical sync period. A default vertical output is

• Edge Triggered Vertical Output

produced after a time delay if the rising edge

• Default Triggered Vertical Output for Non-

mentioned above does not occur within the externally

standard Video Signal (Video Games-Home

set delay period, such as might be the case for a

Computers)

non-standard video signal.

(1) PAL in this datasheet refers to European broadcast TV

standard “Phase Alternating Line”, and not to Programmable

Array Logic.

Connection Diagram

Figure 1. LM1881N

See Package Number D0008A or P0008E

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (18 pages)

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LM1881 www.ti.com SNLS384F – FEBRUARY 1995 – REVISED MARCH 2013 LM1881 Video Sync Separator Check for Samples: LM1881 FEATURES DESCRIPTION • • • • • • • • • The LM1881 Video sync separator extracts timing information including composite and vertical sync, burst/back porch timing, and odd/even field information from standard negative going sync NTSC, PAL (1) and SECAM video signals with amplitude from 0.5V to 2V p-p.
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LM1881 SNLS384F – FEBRUARY 1995 – REVISED MARCH 2013 Absolute Maximum Ratings www.ti.com (1) (2) Supply Voltage 13.2V Input Voltage 3 VP-P (VCC = 5V) 6 VP-P (VCC ≥ 8V) Output Sink Currents; Pins, 1, 3, 5 5 mA Output Sink Current; Pin 7 Package Dissipation 2 mA (3) 1100 mW −65°C to +150°C Storage Temperature Range ESD Susceptibility (4) 2 kV ESD Susceptibility (5) 200 V Soldering Information PDIP Package (10 sec.) 260°C SOIC Package (1) (2) (3) (4) (5) Vapor Phase (60 sec.
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LM1881 www.ti.com SNLS384F – FEBRUARY 1995 – REVISED MARCH 2013 Typical Performance Characteristics RSET Value Selection vs Vertical Serration Pulse Separation Vertical Default Sync Delay Time vs RSET Figure 2. Figure 3. Burst/Black Level Gate Time vs RSET Vertical Pulse Width vs RSET Figure 4. Figure 5. Vertical Pulse Width vs Temperature Supply Current vs Supply Voltage VERTICAL PULSE WIDTH (Ps) 500 400 300 200 100 -40 -20 0 20 40 60 80 100 TEMPERATURE (°C) Figure 6. Figure 7.
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LM1881 SNLS384F – FEBRUARY 1995 – REVISED MARCH 2013 www.ti.com APPLICATION NOTES The LM1881 is designed to strip the synchronization signals from composite video sources that are in, or similar to, the N.T.S.C. format. Input signals with positive polarity video (increasing signal voltage signifies increasing scene brightness) from 0.5V (p-p) to 2V (p-p) can be accommodated. The LM1881 operates from a single supply voltage between 5V DC and 12V DC.
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LM1881 www.ti.com SNLS384F – FEBRUARY 1995 – REVISED MARCH 2013 pulse the integrator output should be between V1 and V2. This would give a high level at the output of the comparator with V1 as one of its inputs. This high is clocked into the “D” flip-flop by the falling edge of the serration pulse (remember the sync signal is inverted in this section of the LM1881). The “Q” output of the “D” flip-flop goes through the OR gate, and sets the R/S flip-flop.
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LM1881 SNLS384F – FEBRUARY 1995 – REVISED MARCH 2013 www.ti.com Instead of using the vertical serration pulse separation, use the actual pulse width of the vertical sync period, or 64 µs in this example. This graph is linear, meaning that a value as large as 2.7 MΩ can be used for RSET (twice the value as the maximum at 30 µs). Due to leakage currents it is advisable to keep the value of RSET under 2.0 MΩ. In this example a value of 1.0 MΩ is selected, well above the minimum of 680 kΩ.
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LM1881 www.ti.com SNLS384F – FEBRUARY 1995 – REVISED MARCH 2013 *Components Optional, See Text Figure 9. ODD/EVEN FIELD PULSE An unusual feature of LM1881 is an output level from Pin 7 that identifies the video field present at the input to the LM1881. This can be useful in frame memory storage applications or in extracting test signals that occur in alternate fields.
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LM1881 SNLS384F – FEBRUARY 1995 – REVISED MARCH 2013 www.ti.com BURST/BACKPORCH OUTPUT PULSE In a composite video signal, the chroma burst is located on the backporch of the horizontal blanking period. This period, approximately 4.8 µs long, is also the black level reference for the subsequent video scan line.
PAGE 9
LM1881 www.ti.com SNLS384F – FEBRUARY 1995 – REVISED MARCH 2013 MULTIPLE CONTIGUOUS VIDEO LINE SELECTOR WITH BLACK LEVEL RESTORATION The circuit in Figure 11 will select a number of adjoining lines starting with the line selected as in the previous example. Additional counters can be added as described previously for either higher starting line numbers or an increased number of contiguous output lines.
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LM1881 SNLS384F – FEBRUARY 1995 – REVISED MARCH 2013 www.ti.com Figure 11.
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LM1881 www.ti.com SNLS384F – FEBRUARY 1995 – REVISED MARCH 2013 REVISION HISTORY Changes from Revision E (March 2013) to Revision F • Page Changed layout of National Data Sheet to TI format ..........................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.
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PACKAGE MATERIALS INFORMATION www.ti.com 11-Oct-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LM1881MX SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM1881MX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 11-Oct-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM1881MX SOIC D 8 2500 367.0 367.0 35.0 LM1881MX/NOPB SOIC D 8 2500 367.0 367.0 35.
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