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PVIN

AGND

PGOOD

SS/TRK

AVIN

COMP

LM20146

VCC

PGND

VCC

OUT

FB2

FB1

(optional)

LM20146

www.ti.com

SNVS563C –FEBRUARY 2008–REVISED APRIL 2013

LM20146 6A, Adjustable Frequency Synchronous Buck Regulator

Check for Samples: LM20146

FEATURES

DESCRIPTION

The LM20146 is a full featured adjustable frequency

• Input Voltage Range 2.95V to 5.5V

synchronous buck regulator capable of delivering up

• Accurate Current Limit Minimizes Inductor

to 6A of continuous output current. The current mode

Size

control loop can be compensated to be stable with

• 97% Peak Efficiency

virtually any type of output capacitor. For most cases,

compensating the device only requires two external

• Adjustable Switching Frequency (250 kHz to

components, providing maximum flexibility and ease

750 kHz)

of use. The device is optimized to work over the input

• 16mΩ and 20mΩ Integrated FET Switches

voltage range of 2.95V to 5.5V making it suitable for

• Starts up into Pre-biased Loads

a wide variety of low voltage systems.

• Output Voltage Tracking

The device features internal over voltage protection

(OVP) and over current protection (OCP) circuits for

• Peak Current Mode Control

increased system reliability. A precision enable pin

• Adjustable Output Voltage Down to 0.8V

and integrated UVLO allows the turn-on of the device

• Adjustable Soft-Start with External Capacitor

to be tightly controlled and sequenced. Start-up

• Precision Enable Pin with Hysteresis

inrush currents are limited by both an internally fixed

and externally adjustable Soft-Start circuit. Fault

• Integrated OVP, UVLO, Power Good and

detection and supply sequencing are possible with

Thermal Shutdown

the integrated power good circuit.

• 16-Pin HTSSOP Exposed Pad Package

The LM20146 is designed to work well in multi-rail

power supply architectures. The output voltage of the

APPLICATIONS

device can be configured to track a higher voltage rail

• Simple to Design, High Efficiency Point of

using the SS/TRK pin. If the output of the LM20146 is

Load Regulation from a 5V or 3.3V Bus

pre-biased at startup it will not pull the ouput low.

• High Performance DSPs, FPGAs, ASICs and

The frequency of this device can be adjusted from

Microprocessors

250 kHz to 750 kHz by connecting an external

resistor from the RT pin to ground.

• Broadband, Networking and Optical

Communications Infrastructure

The LM20146 is offered in a 16-pin HTSSOP

package with an exposed pad that can be soldered to

the PCB, eliminating the need for bulky heatsinks.

Typical Application Circuit

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (29 pages)

PAGE 1
LM20146 www.ti.com SNVS563C – FEBRUARY 2008 – REVISED APRIL 2013 LM20146 6A, Adjustable Frequency Synchronous Buck Regulator Check for Samples: LM20146 FEATURES DESCRIPTION • • The LM20146 is a full featured adjustable frequency synchronous buck regulator capable of delivering up to 6A of continuous output current. The current mode control loop can be compensated to be stable with virtually any type of output capacitor.
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LM20146 SNVS563C – FEBRUARY 2008 – REVISED APRIL 2013 www.ti.com Connection Diagram SS/TRK 1 16 RT FB 2 15 AGND PGOOD 3 14 AVIN COMP 4 13 VCC NC 5 12 EN PVIN 6 11 PGND PVIN 7 10 PGND SW 8 9 EP SW Figure 1. Top View 16-Pin HTSSOP See PWP Package PIN DESCRIPTIONS Pin # Name Description 1 SS/TRK Soft-Start or Tracking control input. An internal 5 µA current source charges an external capacitor to set the Soft-Start ramp rate.
PAGE 3
LM20146 www.ti.com SNVS563C – FEBRUARY 2008 – REVISED APRIL 2013 Absolute Maximum Ratings (1) (2) Voltages from the indicated pins to GND AVIN, PVIN, EN, PGOOD, SS/TRK, COMP, FB, RT -0.3V to +6V Storage Temperature -65°C to 150°C Junction Temperature 150°C (3) 2.6W Lead Temperature (Soldering, 10 sec) 260°C Power Dissipation Minimum ESD Rating (4) (1) (2) (3) (4) ±2kV Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
PAGE 4
LM20146 SNVS563C – FEBRUARY 2008 – REVISED APRIL 2013 www.ti.com Electrical Characteristics (continued) Unless otherwise stated, the following conditions apply: AVIN = PVIN = VIN = 5V. Limits in standard type are for TJ = 25°C only, limits in bold face type apply over the junction temperature (TJ) range of -40°C to +125°C. Minimum and Maximum limits are specified through test, design, or statistical correlation.
PAGE 5
LM20146 www.ti.com SNVS563C – FEBRUARY 2008 – REVISED APRIL 2013 Typical Performance Characteristics Unless otherwise specified: CIN = COUT = 100µF, L = 1.0µH (TDK SPM6530T-1R0M120), VIN = 5V, VOUT = 1.2V, RLOAD = 1.2Ω, fSW = 500 kHz, TA = 25°C for efficiency curves, loop gain plots and waveforms, and TJ = 25°C for all others. Efficiency vs. Load Current (VIN = 5V) Efficiency vs. Load Current (VIN = 3.3V) VOUT = 3.3V VOUT = 2.5V VOUT = 2.5V VOUT = 1.5V VOUT = 1.5V VOUT = 1.2V VOUT = 1.
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LM20146 SNVS563C – FEBRUARY 2008 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified: CIN = COUT = 100µF, L = 1.0µH (TDK SPM6530T-1R0M120), VIN = 5V, VOUT = 1.2V, RLOAD = 1.2Ω, fSW = 500 kHz, TA = 25°C for efficiency curves, loop gain plots and waveforms, and TJ = 25°C for all others. 6 Load Regulation Feedback Pin Voltage vs. Temperature (TJ) Figure 8. Figure 9. Switching Frequency vs. Temperature (TJ) Switching Frequency vs. RT Figure 10.
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LM20146 www.ti.com SNVS563C – FEBRUARY 2008 – REVISED APRIL 2013 Typical Performance Characteristics (continued) Unless otherwise specified: CIN = COUT = 100µF, L = 1.0µH (TDK SPM6530T-1R0M120), VIN = 5V, VOUT = 1.2V, RLOAD = 1.2Ω, fSW = 500 kHz, TA = 25°C for efficiency curves, loop gain plots and waveforms, and TJ = 25°C for all others. Enable Threshold vs. Temperature (TJ) UVLO Threshold vs. Temperature (TJ) Figure 14. Figure 15. Peak Current Limit vs. Temperature (TJ) Peak Current Limit vs.
PAGE 8
LM20146 SNVS563C – FEBRUARY 2008 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified: CIN = COUT = 100µF, L = 1.0µH (TDK SPM6530T-1R0M120), VIN = 5V, VOUT = 1.2V, RLOAD = 1.2Ω, fSW = 500 kHz, TA = 25°C for efficiency curves, loop gain plots and waveforms, and TJ = 25°C for all others. Line Transient Response Start-Up (Soft-Start) VOUT (50 mV/DIV) RLOAD = 1.
PAGE 9
LM20146 www.ti.com SNVS563C – FEBRUARY 2008 – REVISED APRIL 2013 Block Diagram +2.7V REGULATOR AVIN 2.7V VCC UVLO + - SLOPE COMP PVIN COMP 2.7V CURRENT SENSE + 5 PA DISCHARGE (50 Ps) SS/TRK ERROR AMP gm = 510 Pmho + + FB 8.5 VREF + - 800 mV DISCHARGE CURRENT LIMIT + - PVIN + - 864 mV PWM COMPARATOR OVERVOLTAGE + - PG-L 752 mV UNDERVOLTAGE + - DIODE EMULATION CONTROL LOGIC + - SW PVIN THERMAL PROTECTION EN 1.18V + - PGND PG-L OSCILLATOR PGOOD RT AGND Figure 26.
PAGE 10
LM20146 SNVS563C – FEBRUARY 2008 – REVISED APRIL 2013 www.ti.com OPERATION DESCRIPTION General The LM20146 switching regulator features all of the functions necessary to implement an efficient low voltage buck regulator using a minimum number of external components. This easy to use regulator features two integrated switches and is capable of supplying up to 6A of continuous output current.
PAGE 11
LM20146 www.ti.com SNVS563C – FEBRUARY 2008 – REVISED APRIL 2013 Pre-Bias Start up Capability The LM20146 is in a pre-biased state when the device starts up with an output voltage greater than zero. This often occurs in many multi-rail applications such as when powering an FPGA, ASIC, or DSP. In these applications the output can be pre-biased through parasitic conduction paths from one supply rail to another.
PAGE 12
LM20146 SNVS563C – FEBRUARY 2008 – REVISED APRIL 2013 www.ti.com UVLO The LM20146 has a built-in under-voltage lockout protection circuit that keeps the device from switching until the input voltage reaches 2.7V (typical). The UVLO threshold has 45 mV of hysteresis that keeps the device from responding to power-on glitches during start up. If desired the turn-on point of the supply can be changed by using the precision enable pin and a resistor divider network connected to VIN as shown in Figure 33.
PAGE 13
LM20146 SNVS563C – FEBRUARY 2008 – REVISED APRIL 2013 Switchnode Voltage www.ti.com Continuous Conduction Mode (CCM) VIN Time (s) Inductor Current Continuous Conduction Mode (CCM) IAVERAGE Inductor Current Time (s) DCM - CCM Boundary IAVERAGE Switchnode Voltage Time (s) Discontinuous Conduction Mode (DCM) VIN Inductor Current Time (s) Discontinuous Conduction Mode (DCM) IPeak Time (s) Figure 28.
PAGE 14
LM20146 SNVS563C – FEBRUARY 2008 – REVISED APRIL 2013 www.ti.com LM20146 PVIN SW VIN CIN L VOUT RFB1 EN RF AVIN FB CF COUT VIN RFB2 RPG RT RT COMP RC1 CC1 PGOOD VCC SS/TRK PGND GND VPG CVCC CSS Figure 29. Typical Application Circuit The first equation to calculate for any buck converter is duty-cycle.
PAGE 15
LM20146 www.ti.com SNVS563C – FEBRUARY 2008 – REVISED APRIL 2013 Output Capacitor Selection (COUT) The output capacitor, COUT, filters the inductor ripple current and provides a source of charge for transient load conditions. A wide range of output capacitors may be used with the LM20146 that provide excellent performance. The best performance is typically obtained using ceramic, SP, or OSCON type chemistries.
PAGE 16
LM20146 SNVS563C – FEBRUARY 2008 – REVISED APRIL 2013 www.ti.com As indicated by the RMS ripple current equation, highest requirement for RMS current rating occurs at 50% duty cycle. For this case, the RMS ripple current rating of the input capacitor should be greater than half the output current. For best performance, low ESR ceramic capacitors should be placed in parallel with higher capacitance capacitors to provide the best input filtering for the device.
PAGE 17
LM20146 www.ti.com SNVS563C – FEBRUARY 2008 – REVISED APRIL 2013 Table 2. Recommended Compensation for COUT = 100 µF, L = 1.5 µH & fSW = 500 kHz (continued) VIN VOUT CC1 (nF) RC1 (kΩ) 3.30 1.50 2.7 6.81 3.30 1.20 2.7 5.9 3.30 0.80 2.7 4.
PAGE 18
LM20146 SNVS563C – FEBRUARY 2008 – REVISED APRIL 2013 www.ti.com A good starting value for CC1 for most applications is 3.3 nF. Once the value of CC1 is chosen the value of RC should be calculated using the equation below to cancel the output filter pole (FP(FIL)) as shown in Figure 31.
PAGE 19
LM20146 www.ti.com SNVS563C – FEBRUARY 2008 – REVISED APRIL 2013 If different start up times are needed the equation shown below can be used to calculate the start up time. tSS = 0.8V x CSS ISS (12) As shown above, the start up time is influenced by the value of the Soft-Start capacitor CSS(F) and the 5 µA SoftStart pin current ISS(A). While the Soft-Start capacitor can be sized to meet many start up requirements, there are limitations to its size.
PAGE 20
LM20146 SNVS563C – FEBRUARY 2008 – REVISED APRIL 2013 www.ti.com Since the Soft-Start charging current ISS is always present on the SS/TRK pin, the size of R2 should be less than 10 kΩ to minimize the errors in the tracking output. Once a value for R2 is selected the value for R1 can be calculated using appropriate equation in Figure 35, to give the desired start up.
PAGE 21
LM20146 www.ti.com SNVS563C – FEBRUARY 2008 – REVISED APRIL 2013 To obtain an estimate of the device junction temperature, one may use the following relationship: TJ = PDθJA + TA (14) and PD = PIN x (1 - Efficiency) - 1.
PAGE 22
LM20146 SNVS563C – FEBRUARY 2008 – REVISED APRIL 2013 www.ti.com 2. Minimize the copper area of the switch node. Since the LM20146 has the SW pins on opposite sides of the package it is recommended to via these pins down to the bottom or internal layer with 2 to 4 vias on each SW pin. The SW pins should be directly connected with a trace that runs across the bottom of the package.
PAGE 23
LM20146 www.ti.com SNVS563C – FEBRUARY 2008 – REVISED APRIL 2013 Bill of Materials (VIN = 5V, VOUT = 3.3V, FSW = 500kHz, IOUTMAX = 6A) Designator Description Part Number Manufacturer Qty U1 Synchronous Buck Regulator LM20146 Texas Instruments 1 CIN 100µF, 1210, X5R, 6.3V C3225X5R0J107M TDK 1 COUT 100µF, 1210, X5R, 6.3V C3225X5R0J107M TDK 1 L 1µH, 7.
PAGE 24
LM20146 SNVS563C – FEBRUARY 2008 – REVISED APRIL 2013 www.ti.com REVISION HISTORY Changes from Revision B (April 2013) to Revision C • 24 Page Changed layout of National Data Sheet to TI format ..........................................................................................................
PAGE 25
PACKAGE OPTION ADDENDUM www.ti.
PAGE 26
PACKAGE MATERIALS INFORMATION www.ti.com 29-May-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) LM20146MHE/NOPB HTSSOP PWP 16 250 178.0 12.4 LM20146MHX/NOPB HTSSOP PWP 16 2500 330.0 12.4 Pack Materials-Page 1 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 6.95 8.3 1.6 8.0 12.0 Q1 6.95 8.3 1.6 8.0 12.
PAGE 27
PACKAGE MATERIALS INFORMATION www.ti.com 29-May-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM20146MHE/NOPB HTSSOP PWP LM20146MHX/NOPB HTSSOP PWP 16 250 210.0 185.0 35.0 16 2500 367.0 367.0 35.
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MECHANICAL DATA PWP0016A MXA16A (Rev A) www.ti.
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