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LM25116

www.ti.com

SNVS509D –APRIL 2007–REVISED FEBRUARY 2013

Wide Range Synchronous Buck Controller

Check for Samples: LM25116

FEATURES

DESCRIPTION

The LM25116 is a synchronous buck controller

• Emulated peak current mode

intended for step-down regulator applications from a

• Wide operating range up to 42V

high voltage or widely varying input supply. The

• Low I

shutdown (< 10 µA)

control method is based upon current mode control

utilizing an emulated current ramp. Current mode

• Drives standard or logic level MOSFETs

control provides inherent line feed-forward, cycle by

• Robust 3.5A peak gate drive

cycle current limiting and ease of loop compensation.

• Free-run or synchronous operation to 1 MHz

The use of an emulated control ramp reduces noise

sensitivity of the pulse-width modulation circuit,

• Optional diode emulation mode

allowing reliable control of very small duty cycles

• Programmable output from 1.215V to 36V

necessary in high input voltage applications. The

• Precision 1.5% voltage reference

operating frequency is programmable from 50 kHz to

1 MHz. The LM25116 drives external high-side and

• Programmable current limit

low-side NMOS power switches with adaptive dead-

• Programmable soft-start

time control. A user-selectable diode emulation mode

• Programmable line under-voltage lockout

enables discontinuous mode operation for improved

• Automatic switch to external bias supply

efficiency at light load conditions. A low quiescent

current shutdown disables the controller and

• HTSSOP-20 exposed pad

consumes less than 10 µA of total input current.

• Thermal shutdown

Additional features include a high voltage bias

regulator, automatic switch-over to external bias for

improved efficiency, thermal shutdown, frequency

synchronization, cycle by cycle current limit and

adjustable line under-voltage lockout. The device is

available in a power enhanced HTSSOP-20 package

featuring an exposed die attach pad to aid thermal

dissipation.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (36 pages)

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LM25116 www.ti.com SNVS509D – APRIL 2007 – REVISED FEBRUARY 2013 Wide Range Synchronous Buck Controller Check for Samples: LM25116 FEATURES DESCRIPTION • • • • • • • • • • • • • • • The LM25116 is a synchronous buck controller intended for step-down regulator applications from a high voltage or widely varying input supply. The control method is based upon current mode control utilizing an emulated current ramp.
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LM25116 SNVS509D – APRIL 2007 – REVISED FEBRUARY 2013 www.ti.
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LM25116 www.ti.com SNVS509D – APRIL 2007 – REVISED FEBRUARY 2013 PIN DESCRIPTIONS Pin Name Description 1 VIN 2 UVLO Chip supply voltage, input voltage monitor and input to the VCC regulator. 3 RT/SYN C The internal oscillator is set with a single resistor between this pin and the AGND pin. The recommended frequency range is 50 kHz to 1 MHz. The internal oscillator can be synchronized to an external clock by AC coupling a positive edge onto this node. 4 EN If the EN pin is below 0.
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LM25116 SNVS509D – APRIL 2007 – REVISED FEBRUARY 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) VIN to GND -0.3V to 45V VCC, VCCX, UVLO to GND (2) -0.3 to 16V SW, CS to GND -3.0 to 45V HB to SW -0.3 to 16V HO to SW -0.3 to HB+0.3V VOUT to GND -0.
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LM25116 www.ti.com SNVS509D – APRIL 2007 – REVISED FEBRUARY 2013 Electrical Characteristics (continued) Limits in standard type are for TJ = 25°C only; limits in boldface type apply over the junction temperature range of -40°C to +125°C and are provided for reference only. Unless otherwise specified, the following conditions apply: VIN = 24V, VCC = 7.4V, VCCX = 0V, EN = 5V, RT = 16 kΩ, no load on LO and HO. Symbol Parameter Conditions Typ Max VCCX Switch RDS(ON) ICCX = 10 mA Min 3.8 6.
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LM25116 SNVS509D – APRIL 2007 – REVISED FEBRUARY 2013 www.ti.com Electrical Characteristics (continued) Limits in standard type are for TJ = 25°C only; limits in boldface type apply over the junction temperature range of -40°C to +125°C and are provided for reference only. Unless otherwise specified, the following conditions apply: VIN = 24V, VCC = 7.4V, VCCX = 0V, EN = 5V, RT = 16 kΩ, no load on LO and HO.
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LM25116 www.ti.com SNVS509D – APRIL 2007 – REVISED FEBRUARY 2013 Typical Performance Characteristics Typical Application Circuit Efficiency Driver Source Current vs VCC Figure 2. Figure 3. Driver Dead-time vs Temperature HO High RDS(ON) vs VCC Figure 4. Figure 5. Driver Sink Current vs VCC HO Low RDS(ON) vs VCC Figure 6. Figure 7.
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LM25116 SNVS509D – APRIL 2007 – REVISED FEBRUARY 2013 www.ti.com Typical Performance Characteristics (continued) 8 LO High RDS(ON) vs VCC EN Input Threshold vs Temperature Figure 8. Figure 9. LO Low RDS(ON) vs VCC HB to SW UVLO vs Temperature Figure 10. Figure 11. Forced HO Off-time vs Temperature VCCX = 5V HB DC Bias Current vs Temperature Figure 12. Figure 13.
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LM25116 www.ti.com SNVS509D – APRIL 2007 – REVISED FEBRUARY 2013 Typical Performance Characteristics (continued) Frequency vs RT Error Amp Gain vs Frequency Figure 14. Figure 15. Frequency vs Temperature Error Amp Phase vs Frequency Figure 16. Figure 17. Frequency vs Temperature Current Limit Threshold vs Temperature Figure 18. Figure 19.
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LM25116 SNVS509D – APRIL 2007 – REVISED FEBRUARY 2013 www.ti.com Typical Performance Characteristics (continued) 10 VIN Operating Current vs Temperature VCC vs Temperature Figure 20. Figure 21. VCC UVLO vs Temperature VCC vs VIN Figure 22. Figure 23. VCC vs ICC VCCX Switch RDS(ON) vs VCCX Figure 24. Figure 25.
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LM25116 www.ti.com SNVS509D – APRIL 2007 – REVISED FEBRUARY 2013 BLOCK DIAGRAM AND TYPICAL APPLICATION CIRCUIT VCCX 17 VCCX LM25116 VIN 4.5V 6V - 42V C IN 1 VIN R UV2 VCC 16 UVLO SLEEP MODE SHUTDOWN 1.215V STANDBY D2 HB 18 THERMAL SHUTDOWN 5 PA UVLO LOGIC C FT HICCUP FAULT TIMER 256 CLOCK CYCLES UVLO DIS CHB VIN DRIVER HO 19 CLK 7 SS 10 PA 3V PWM CSS C COMP R Q ADAPTIVE TIMER TRACK SAMPLE and HOLD 1.
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LM25116 SNVS509D – APRIL 2007 – REVISED FEBRUARY 2013 www.ti.com High Voltage Start-Up Regulator The LM25116 contains a dual mode internal high voltage startup regulator that provides the VCC bias supply for the PWM controller and a boot-strap gate drive for the high-side buck MOSFET. The input pin (VIN) can be connected directly to an input voltage source as high as 42 volts. For input voltages below 10.6V, a low dropout switch connects VCC directly to VIN.
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LM25116 www.ti.com SNVS509D – APRIL 2007 – REVISED FEBRUARY 2013 Enable The LM25116 contains an enable function allowing a very low input current shutdown. If the enable pin is pulled below 0.5V, the regulator enters shutdown, drawing less than 10 µA from the VIN pin. Raising the EN input above 3.3V returns the regulator to normal operation. The maximum EN transition time for proper operation is one switching period. For example, the enable rise time must be less than 4 µs for 250 kHz operation.
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LM25116 SNVS509D – APRIL 2007 – REVISED FEBRUARY 2013 www.ti.com The LM25116 oscillator has a maximum programmable frequency that is dependent on the VCC voltage. If VCC is above 6V, the frequency can be programmed up to 1 MHz. If VCCX is used to bias VCC and VCCX < 6V, the maximum programmable oscillator frequency is 750 kHz. The RT/SYNC pin can be used to synchronize the internal oscillator to an external clock.
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LM25116 www.ti.com SNVS509D – APRIL 2007 – REVISED FEBRUARY 2013 IR = 5 µA/V x (VIN - VOUT) + 25 µA (2) Proper selection of the RAMP capacitor (CRAMP) depends upon the value of the output inductor (L) and the current sense resistor (RS). For proper current emulation, the DC sample and hold value and the ramp amplitude must have the same dependence on the load current.
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LM25116 SNVS509D – APRIL 2007 – REVISED FEBRUARY 2013 www.ti.com start cycle once UVLO charges back to 1.215V. This process is repeated until the fault is removed. The hiccup off-time can be controlled by a capacitor to ground on the UVLO pin. In applications with low output inductance and high input voltage, the switch current may overshoot due to the propagation delay of the current limit comparator. If an overshoot should occur, the sample-and-hold circuit will detect the excess recirculating current.
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LM25116 www.ti.com SNVS509D – APRIL 2007 – REVISED FEBRUARY 2013 Soft-Start and Diode Emulation The soft-start feature allows the regulator to gradually reach the initial steady state operating point, thus reducing start-up stresses and surges. The LM25116 will regulate the FB pin to the SS pin voltage or the internal 1.215V reference, whichever is lower.
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LM25116 SNVS509D – APRIL 2007 – REVISED FEBRUARY 2013 www.ti.com In some applications it may be desirable to slow down the high-side MOSFET turn-on time in order to control switching spikes. This may be accomplished by adding a resistor is series with the HO output to the high-side gate. Values greater than 10Ω should be avoided so as not to interfere with the adaptive gate drive.
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LM25116 www.ti.com SNVS509D – APRIL 2007 – REVISED FEBRUARY 2013 Knowing the switching frequency (fSW), maximum ripple current (IPP), maximum input voltage (VIN(MAX)) and the nominal output voltage (VOUT), the inductor value can be calculated: VOUT VOUT x 1L= VIN(MAX) IPP x fSW (8) The maximum ripple current occurs at the maximum input voltage. Typically, IPP is 20% to 40% of the full load current.
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LM25116 SNVS509D – APRIL 2007 – REVISED FEBRUARY 2013 www.ti.com OUTPUT CAPACITORS The output capacitors smooth the inductor ripple current and provide a source of charge for transient loading conditions. For this design example, five 100 µF ceramic capacitors where selected. Ceramic capacitors provide very low equivalent series resistance (ESR), but can exhibit a significant reduction in capacitance with DC bias. From the manufacturer’s data, the ESR at 250 kHz is 2 mΩ / 5 = 0.
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LM25116 www.ti.com SNVS509D – APRIL 2007 – REVISED FEBRUARY 2013 When δ = 1, the input filter is critically damped. This may be difficult to achieve with practical component values. With δ < 0.2, the input filter will exhibit significant ringing. If δ is zero or negative, there is not enough resistance in the circuit and the input filter will sustain an oscillation.
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LM25116 SNVS509D – APRIL 2007 – REVISED FEBRUARY 2013 www.ti.com 2. With an appropriate value for RUV2, RUV1 can be selected using Equation 25. RUV2 RUV1 = 1.215 x VIN(MIN) + (5 PA x RUV2) - 1.215 where • VIN(MIN) is the desired shutdown voltage. (25) 3. Capacitor CFT provides filtering for the divider and determines the off-time of the “hiccup” duty cycle during current limit.
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LM25116 www.ti.com SNVS509D – APRIL 2007 – REVISED FEBRUARY 2013 turns on before the MOSFET itself, minimizing the voltage from drain to source before turn-on. For this example, the maximum drain-to-source voltage applied to either MOSFET is 42V. VCC provides the drive voltage at the gate of the MOSFETs. The selected MOSFETs must be able to withstand 42V plus any ringing from drain to source, and be able to handle at least VCC plus ringing from gate to source.
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LM25116 SNVS509D – APRIL 2007 – REVISED FEBRUARY 2013 www.ti.com Components RCOMP and CCOMP configure the error amplifier as a type II configuration. The DC gain of the amplifier is 80 dB which has a pole at low frequency and a zero at fZEA = 1 / (2π x RCOMP x CCOMP). The error amplifier zero cancels the modulator pole leaving a single pole response at the crossover frequency of the voltage loop. A single pole response at the crossover frequency yields a very stable loop with 90° of phase margin.
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LM25116 www.ti.com SNVS509D – APRIL 2007 – REVISED FEBRUARY 2013 If a network analyzer is available, the modulator gain can be measured and the error amplifier gain can be configured for the desired loop transfer function. If a network analyzer is not available, the error amplifier compensation components can be designed with the guidelines given. Step load transient tests can be performed to verify acceptable performance. The step load goal is minimum overshoot with a damped response.
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LM25116 SNVS509D – APRIL 2007 – REVISED FEBRUARY 2013 gm x L CRAMP = A x RS x 1+ www.ti.com 5 - VOUT VIN(MIN) (39) Best Performance Method: This minimizes the current limit deviation due to changes in line voltage, while maintaining near optimal slope compensation. Calculate optimal slope current, IOS = (VOUT / 3) x 10 µA/V. For example, at VOUT = 7.5V, IOS = 25 µA. VCS(TH) IOS x L CRAMP = RS = VOUT x A x RS VOUT x T IOUT + L (40) Calculate VRAMP at the nominal input voltage.
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LM25116 www.ti.com SNVS509D – APRIL 2007 – REVISED FEBRUARY 2013 VOUT VCOMP = RLOAD 1 x A x RS 1+ Km x A x RS (D ± 0.5) x A x RS x T L gm x T KSL = Se = x RLOAD 1+ s ZP s ZZ x 1+ s s2 + Zn x Q Zn2 (44) 1 Km = ZZ = 1+ VSL = CRAMP 1 COUT x ESR ZP = + (1 - 2 x D) x KSL + VIN (45) IOS x T CRAMP 1 COUT (VIN ± VOUT) x KSL + VSL T mC = VSL Se x 1 RLOAD Sn = Q= Sn (46) + 1 Km x A x RS Zn = S T (47) VIN x A x RS L 1 S x (mC ± 0.
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LM25116 SNVS509D – APRIL 2007 – REVISED FEBRUARY 2013 www.ti.com loop gain of the amplifier and the feedback divider ratio. (51) Typical Application Schematic Figure 41. 5V 7A Typical Application Schematic Table 1. Bill of Materials for 7V-42V Input, 5V 7A Output, 250kHz ID Part Number Type Size Parameters Qty C1, C2, C14 C2012X7R1E105K Capacitor, Ceramic C3 VJ0603Y103KXAAT Capacitor, Ceramic C4 VJ0603A271JXAAT C5, C15 C6 0805 1µF, 25V, X7R 3 TDK 0603 0.
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LM25116 www.ti.com SNVS509D – APRIL 2007 – REVISED FEBRUARY 2013 Table 1. Bill of Materials for 7V-42V Input, 5V 7A Output, 250kHz (continued) ID Part Number Type Size P1-P4 1514-2 Turret Terminal .090” dia. TP1-TP5 5012 Test Point .040” dia. Q1, Q2 Si7850DP N-CH MOSFET SO-8 Power PAK R1 CRCW06031023F Resistor R2 CRCW06032102F Resistor R3 CRCW06033741F R4 CRCW06031211F R5 Parameters Qty Vendor 4 Keystone 5 Keystone 10.
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LM25116 SNVS509D – APRIL 2007 – REVISED FEBRUARY 2013 www.ti.com REVISION HISTORY Changes from Revision C (February 2013) to Revision D • 30 Page Changed layout of National Data Sheet to TI format ..........................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device LM25116MHX/NOPB Package Package Pins Type Drawing SPQ HTSSOP 2500 PWP 20 Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 330.0 16.4 Pack Materials-Page 1 6.95 B0 (mm) K0 (mm) P1 (mm) 7.1 1.6 8.0 W Pin1 (mm) Quadrant 16.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM25116MHX/NOPB HTSSOP PWP 20 2500 367.0 367.0 35.
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MECHANICAL DATA PWP0020A MXA20A (Rev C) www.ti.
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