Datasheet

ENABLE and
UVLO
Thermal
SHDN
Internal - LDO
EN
SW
FB
GND
VIN
Dead-
Time-
Control
Logic
P
good
880 mV
720 mV
OVP
SHDN
SOFT-START
Internal-
Comp
DRIVERS
Control
Logic
I
SENSE
I
LIMIT
P-FET
N-FET
V
REF
=0.8V
+
-


2.2 MHz/550 kHz
+
-
+
-
+
-
+
-
+
-
VREF
+
-
x
1.15
S R
R Q
Q
R S
I
REVERSE-LIMIT
Clock
+
-
+
-
RAMP
Artificial
I
SENSE
LM26420
SNVS579F –FEBRUARY 2009–REVISED MARCH 2013 www.ti.com
Simplified Block Diagram Per Buck
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