Datasheet

0
0
V
IN
T
ON
t
t
Inductor
Current
D = T
ON
/T
SW
V
SW
T
OFF
T
SW
I
L
I
PK
SW
Voltage
LM26420
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SNVS579F FEBRUARY 2009REVISED MARCH 2013
APPLICATIONS INFORMATION
THEORY OF OPERATION
The LM26420 is a constant frequency dual PWM buck synchronous regulator IC that delivers two 2.0A load
currents. The regulator has a preset switching frequency of 2.2MHz or 550kHz. This high frequency allows the
LM26420 to operate with small surface mount capacitors and inductors, resulting in a DC/DC converter that
requires a minimum amount of board space. The LM26420 is internally compensated, so it is simple to use and
requires few external components. The LM26420 uses current-mode control to regulate the output voltage. The
following operating description of the LM26420 will refer to the Simplified Block Diagram, which depicts the
functional blocks for one of the two channels, and to the waveforms in Figure 33. The LM26420 supplies a
regulated output voltage by switching the internal PMOS and NMOS switches at constant frequency and variable
duty cycle. A switching cycle begins at the falling edge of the reset pulse generated by the internal clock. When
this pulse goes low, the output control logic turns on the internal PMOS control switch (TOP Switch). During this
on-time, the SW pin voltage (V
SW
) swings up to approximately V
IN
, and the inductor current (I
L
) increases with a
linear slope. I
L
is measured by the current sense amplifier, which generates an output proportional to the switch
current. The sense signal is summed with the regulator’s corrective ramp and compared to the error amplifier’s
output, which is proportional to the difference between the feedback voltage and V
REF
. When the PWM
comparator output goes high, the TOP Switch turns off and the NMOS switch (BOTTOM Switch) turns on after a
short delay, which is controlled by the Dead-Time-Control Logic, until the next switching cycle begins. During the
top switch off-time, inductor current discharges through the BOTTOM Switch, which forces the SW pin to swing
to ground. The regulator loop adjusts the duty cycle (D) to maintain a constant output voltage.
Figure 33. Typical Waveforms
SOFT-START
This function forces V
OUT
to increase at a controlled rate during start up in a controlled fashion, which helps
reduce inrush current and eliminate overshoot on V
OUT
. During soft-start, the error amplifier’s reference voltage
ramps from 0V to its nominal value of 0.8V in approximately 600 µs. If the converter is turned on into a pre-
biased condition then the feedback will begin ramping from the pre-bias voltage but at the same rate as if it had
started from 0V. The two outputs startup ratiometrically if enabled at the same time, see Figure 34 below.
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