Datasheet

x R2
R1 =
V
REF
V
OUT
- 1
'V
OUT
= 'I
L
R
ESR
+
8 x F
SW
x C
OUT
1
LM26420
www.ti.com SNVS579F –FEBRUARY 2009–REVISED MARCH 2013
Figure 36. Determining d1, d2 and d3
OUTPUT CAPACITOR
The output capacitor is selected based upon the desired output ripple and transient response. The initial current
of a load transient is provided mainly by the output capacitor. The output ripple of the converter is:
(12)
When using MLCCs, the ESR is typically so low that the capacitive ripple may dominate. When this occurs, the
output ripple will be approximately sinusoidal and 90° phase shifted from the switching action. Given the
availability and quality of MLCCs and the expected output voltage of designs using the LM26420, there is really
no need to review any other capacitor technologies. Another benefit of ceramic capacitors is their ability to
bypass high frequency noise. A certain amount of switching edge noise will couple through parasitic
capacitances in the inductor to the output. A ceramic capacitor will bypass this noise while a tantalum will not.
Since the output capacitor is one of the two external components that control the stability of the regulator control
loop, most applications will require a minimum of 22 µF of output capacitance. Capacitance often, but not always,
can be increased significantly with little detriment to the regulator stability. Like the input capacitor, recommended
multilayer ceramic capacitors are X7R or X5R types.
PROGRAMMING OUTPUT VOLTAGE
The output voltage is set using the following equation where R2 is connected between the FB pin and GND, and
R1 is connected between V
OUT
and the FB pin. A good value for R2 is 10kΩ. When designing a unity gain
converter (V
OUT
= 0.8V), R1 should be between 0Ω and 100Ω, and R2 should be on the order of 5kΩ to 50kΩ,
10kΩ is the suggested value.
(13)
V
REF
= 0.80V (14)
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