Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - voltage regulators - DC DC switch controllers TSSOP 14

LM2742

BOOT

SEN

PGND

PWGD

FREQ

SGND

EAO

PGND

+5V

= 3.3V

= 1.2V@5A

1,2

2200 PF

6.3V, 2.8A

1.5 PH

6.1A, 9.6 m:

fb2

FADJ

BOOT

10 PF

6.3V

10k

2.2k

10k

392k

2.2p

180p

12n

63.4k

2.2 PF

10:

0.1P

1,2

fb1

Si4884DY

LM2742

www.ti.com

SNVS266C –MARCH 2004–REVISED MARCH 2013

LM2742 N-Channel FET Synchronous Buck Regulator Controller for Low Output Voltages

Check for Samples: LM2742

FEATURES

DESCRIPTION

The LM2742 is a high-speed, synchronous, switching

• Input Power from 1V to 16V

regulator controller. It is intended to control currents

• Output Voltage Adjustable down to 0.6V

of 0.7A to 20A with up to 95% conversion efficiencies.

• Power Good Flag, Adjustable Soft-start and

Power up and down sequencing is achieved with the

Output Enable for Easy Power Sequencing

power-good flag, adjustable soft-start and output

enable features. The LM2742 operates from a low-

• Reference Accuracy: 1.5% (0°C–125°C)

current 5V bias and can convert from a 1V to 16V

• Current Limit Without Sense Resistor

power rail. The part utilizes a fixed-frequency,

• Soft Start

voltage-mode, PWM control architecture and the

switching frequency is adjustable from 50kHz to

• Switching Frequency from 50 kHz to 2 MHz

2MHz by setting the value of an external resistor.

• 40ns Typical Minimum On-time

Current limit is achieved by monitoring the voltage

• TSSOP-14 Package

drop across the on-resistance of the low-side

MOSFET, which enables on-times on the order of

APPLICATIONS 40ns, one of the best in the industry. The wide range

of operating frequencies gives the power supply

• POL Power Supply Modules

designer the flexibility to fine-tune component size,

• Cable Modems

cost, noise and efficiency. The adaptive, non-

overlapping MOSFET gate-drivers and high-side

• Set-Top Boxes/ Home Gateways

bootstrap structure helps to further maximize

• DDR Core Power

efficiency. The high-side power FET drain voltage can

• High-Efficiency Distributed Power

be from 1V to 16V and the output voltage is

adjustable down to 0.6V.

• Local Regulation of Core Power

TYPICAL APPLICATION

Figure 1. Typical Application Circuit

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (32 pages)

PAGE 1
LM2742 www.ti.com SNVS266C – MARCH 2004 – REVISED MARCH 2013 LM2742 N-Channel FET Synchronous Buck Regulator Controller for Low Output Voltages Check for Samples: LM2742 FEATURES DESCRIPTION • • • The LM2742 is a high-speed, synchronous, switching regulator controller. It is intended to control currents of 0.7A to 20A with up to 95% conversion efficiencies. Power up and down sequencing is achieved with the power-good flag, adjustable soft-start and output enable features.
PAGE 2
LM2742 SNVS266C – MARCH 2004 – REVISED MARCH 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. CONNECTION DIAGRAM 1 2 4 5 6 7 HG LG PGND SGND VCC PWGD ISEN PGND LM2742 3 BOOT SD FREQ FB SS EAO 14 13 12 11 10 9 8 Figure 2.
PAGE 3
LM2742 www.ti.com SNVS266C – MARCH 2004 – REVISED MARCH 2013 ABSOLUTE MAXIMUM RATINGS (1) If Military/Aerospace specified devices are required, contact the Texas Instruments Semiconductor Sales Office/ Distributors for availability and specifications.
PAGE 4
LM2742 SNVS266C – MARCH 2004 – REVISED MARCH 2013 www.ti.com ELECTRICAL CHARACTERISTICS VCC = 5V unless otherwise indicated. Typicals and limits appearing in plain type apply for TA=TJ=+25°C. Limits appearing in boldface type apply over full Operating Temperature Range. Datasheet min/max specification limits are specified by design, test, or statistical analysis. Symbol VFB_ADJ VON Parameter FB Pin Voltage UVLO Thresholds Min Typ Max VCC = 4.5V, 0°C to +125°C Conditions 0.591 0.6 0.
PAGE 5
LM2742 www.ti.com SNVS266C – MARCH 2004 – REVISED MARCH 2013 ELECTRICAL CHARACTERISTICS (continued) VCC = 5V unless otherwise indicated. Typicals and limits appearing in plain type apply for TA=TJ=+25°C. Limits appearing in boldface type apply over full Operating Temperature Range. Datasheet min/max specification limits are specified by design, test, or statistical analysis. Symbol Parameter Conditions Min Typ Max Units OSCILLATOR RFADJ = 590kΩ 50 RFADJ = 88.
PAGE 6
LM2742 SNVS266C – MARCH 2004 – REVISED MARCH 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS Efficiency (VO = 1.5V) FSW = 300kHz, TA = 25°C Efficiency (VO = 3.3V) FSW = 300kHz, TA = 25°C 100 100 Vin = 5V Vin = 3.3V 90 90 EFFICIENCY (%) EFFICIENCY (%) 80 Vin = 5V 70 60 50 Vin = 12V 40 80 70 50 40 30 30 0.1 20 0.2 1 3 5 9 7 0.5 2 4 6 8 10 OUTPUT CURRENT (A) OUTPUT CURRENT (A) Figure 3. Figure 4.
PAGE 7
LM2742 www.ti.com SNVS266C – MARCH 2004 – REVISED MARCH 2013 TYPICAL PERFORMANCE CHARACTERISTICS (continued) RFADJ vs PWM Frequency (in 100 to 800kHz range), TA = 25°C RFADJ vs PWM Frequency (in 900 to 2000kHz range), TA = 25°C 500 30 400 RF-ADJ (k:) RF-ADJ (k:) 25 300 200 20 15 100 0 100 150 200 250 300 350 400450 500 600 700 800 PWM FREQUENCY (kHz) 10 9001000110012001300140015001600170018001900 PWM FREQUENCY (kHz) Figure 9. Figure 10.
PAGE 8
LM2742 SNVS266C – MARCH 2004 – REVISED MARCH 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (continued) Start-Up (Full-Load) VIN = 10V, VO = 1.2V IO = 10A, CSS = 10nF, FSW = 300kHz Start Up (No-Load, 10x CSS) VIN = 10V, VO = 1.2V CSS = 100nF, FSW = 300kHz Figure 15. Figure 16. Start Up (Full Load, 10x CSS) VIN = 10V, VO = 1.2V IO = 10A, CSS = 100nF, FSW = 300kHz Start Up (Into 1.2V Pre-Bias) VIN = 12V, VO = 2.5V No Load, No Soft Start Capacitor, FSW = 300kHz VO = 2.5 VO Pre-bias = 1.2V 2.
PAGE 9
LM2742 www.ti.com SNVS266C – MARCH 2004 – REVISED MARCH 2013 TYPICAL PERFORMANCE CHARACTERISTICS (continued) Shutdown (No Load) VIN = 12V, VO = 1.2V IO = 10A, CSS = 10nF FSW = 300kHz Load Transient Response (IO = 0 to 4A) VIN = 12V, VO = 1.2V FSW = 300kHz VO 500 mV VCSS 2.0V IIN 1A/div VSD 5.0V 40 Ps/DIV Figure 21. Figure 22. Load Transient Response (IO = 4 to 0A) VIN = 12V, VO = 1.2V FSW = 300kHz Line Transient Response (VIN =5V to 12V) VO = 1.2V, IO = 5A FSW = 300kHz Figure 23. Figure 24.
PAGE 10
LM2742 SNVS266C – MARCH 2004 – REVISED MARCH 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN Peak Current During Current Limit = 12V, VO = 3.3V, ILIM = 4A, FSW = 300kHz, L = 15 µH Peak Current During Current Limit VIN = 12V, VO = 3.3V, ILIM = 4A, FSW = 300kHz, L = 15 µH 2V/DIV VO VO 2V/DIV 2A/DIV IL 2A/DIV 2V/DIV IL 2V/DIV VCSS VCSS 10V/DIV 10V/DIV VSW VSW 10 4 Ps/DIV 200 Ps/DIV Figure 27. Figure 28.
PAGE 11
LM2742 www.ti.com SNVS266C – MARCH 2004 – REVISED MARCH 2013 BLOCK DIAGRAM FREQ VCC CLOCK & RAMP UVLO SD PGND PGND SGND 20 PA off LOGIC BOOT 10 Ps DELAY HG PWGD off SYNCHRONOUS DRIVER LOGIC 3.05V 10 PA HIGH LOW LG 0.708V tol.=+/-2% 0.42V tol.=+/-2% hyst.=12% S OUTPUT CLAMP HI: 3.25V LO: 1.25V SS 3.25V 1.25V oc 95 PA R R>S SS CMP PWM 50 PA BG = 0.
PAGE 12
LM2742 SNVS266C – MARCH 2004 – REVISED MARCH 2013 www.ti.com APPLICATION INFORMATION THEORY OF OPERATION The LM2742 is a voltage-mode, high-speed synchronous buck regulator with a PWM control scheme. It is designed for use in set-top boxes, thin clients, DSL/Cable modems, and other applications that require high efficiency buck converters. It has power good (PWRGD), and output shutdown (SD). Current limit is achieved by sensing the voltage VDS across the low side FET.
PAGE 13
LM2742 www.ti.com SNVS266C – MARCH 2004 – REVISED MARCH 2013 D1 5V + VCC BOOT CBOOT HG LM2742 + LG Figure 29. BOOT Supplied by Charge Pump In a system without a separate, higher voltage, a charge pump (bootstrap) can be built using a diode and small capacitor, Figure 29. The capacitor serves to maintain enough voltage between the top FET gate and source to control the device even when the top FET is on and its source has risen up to the input voltage level.
PAGE 14
LM2742 SNVS266C – MARCH 2004 – REVISED MARCH 2013 www.ti.com beginning of a clock cycle. In current limit mode, by contrast, the high side FET on pulse is skipped. This causes inductor current to fall. Unlike a normal operation switching cycle, however, in a current limit mode switching cycle the high side FET will turn on as soon as inductor current has fallen to the current limit threshold.
PAGE 15
LM2742 www.ti.com SNVS266C – MARCH 2004 – REVISED MARCH 2013 DESIGN CONSIDERATIONS The following is a design procedure for all the components needed to create the circuit shown in Figure 32 in the Example Circuits section, a 5V in to 1.2V out converter, capable of delivering 10A with an efficiency of 85%. The switching frequency is 300kHz. The same procedures can be followed to create many other designs with varying input voltages, output voltages, and output currents.
PAGE 16
LM2742 SNVS266C – MARCH 2004 – REVISED MARCH 2013 www.ti.com Output Inductor The output inductor forms the first half of the power stage in a Buck converter. It is responsible for smoothing the square wave created by the switching action and for controlling the output current ripple. (ΔIo) The inductance is chosen by selecting between tradeoffs in output ripple, efficiency, and response time. The smaller the output inductor, the more quickly the converter can respond to transients in the load current.
PAGE 17
LM2742 www.ti.com SNVS266C – MARCH 2004 – REVISED MARCH 2013 Control Loop Components The circuit is this design example and the others shown in the Example Circuits section have been compensated to improve their DC gain and bandwidth. The result of this compensation is better line and load transient responses. For the LM2742, the top feedback divider resistor, Rfb2, is also a part of the compensation. For the 10A, 5V to 1.2V design, the values are: Cc1 = 4.7pF 10%, Cc2 = 1nF 10%, Rc = 229kΩ 1%.
PAGE 18
LM2742 SNVS266C – MARCH 2004 – REVISED MARCH 2013 PCin I INrms 2 Irms rip www.ti.com ESR n rip IO (19) D 1 D (20) 4.282*0.018/2 = 0.164W Input Inductor Loss PLin = I2in * DCRinput-L I D IIN O Kest ' d (21) (22) 2 2.82 *0.007 = 0.055W Output Inductor Loss PLout = I2o * DCRoutput-L (23) 2 10 *0.004 = 0.4W System Efficiency 12 22 1.7 87.5% (24) Example Circuits +5V RIN 10 CIN 2.2P RFADJ 0.1P CINX 1 PF, 25V Q1 VCC HG SD BOOT 2.7 PH 14.4A, 4.5 m: RCS ISEN PWGD LM2742 FREQ 88.
PAGE 19
LM2742 www.ti.com SNVS266C – MARCH 2004 – REVISED MARCH 2013 1.2 PH 8.2A, 6.9 m: CBOOT D1 RIN 10 VIN = 5V LIN CINx1, 2 + CIN1,2 2x1 PF 2 x 5600 PF 10V 10V, 2.35A 0.1P Q1 CIN VCC 2.2P SD HG BOOT PWGD RFADJ ISEN LM2742 FREQ 88.7k CSS 12n 1.5 PH 15A, 4 m: RCS LG SS PGND SGND PGND EAO Vo = 1.2V@10A L1 1.5k Q2 + Co1-3 3 x 5600 PF 10V, 3.1A 18 m: Rfb2 4.99k FB Rfb1 4.99k Cc1 Cc2 Rc1 4.7p 229k 270p Figure 32. 5V to 1.
PAGE 20
LM2742 SNVS266C – MARCH 2004 – REVISED MARCH 2013 www.ti.com +5V 1 PH 4.5A, 7.5 m: CBOOT D1 VIN = 3.3V RIN 10 LIN 0.1P CIN VCC 2.2P SD BOOT PWGD RFADJ Q1 HG Rcs 1 PH 11A, 3.7 m: 3.3k L1 ISEN FREQ LG Css 12n SS PGND SGND PGND EAO + CIN1 1 x 5600 PF 10V, 2.35A Vo = 0.8V@5A + Co1,2 2 x 4700 PF 16V, 2.8A Rfb2 Q2 49.9k CINx 1 PF 10V 4.99k FB Rfb1 Cc1 14.9k Cc2 Rc1 4.7p 147k 680p Figure 34. 3.3V to 0.
PAGE 21
LM2742 www.ti.com SNVS266C – MARCH 2004 – REVISED MARCH 2013 The circuits in Figure 35 are intended for ADSL applications, where the high switching frequency keeps noise out of the data transmission range. In this design, the 1.8 and 3.3V outputs come up simultaneously by using the same softstart capacitor. Because two current sources now charge the same capacitor, the capacitance must be doubled to achieve the same softstart time. (Here, 40nF is used to achieve a 5ms softstart time.
PAGE 22
LM2742 SNVS266C – MARCH 2004 – REVISED MARCH 2013 www.ti.com Table 1. Bill of Materials for Typical Application Circuit (Figure 1) ID U1 Part Number Type Synchronous Controller LM2742 Q1, Q2 Si4884DY L1 RLF7030T-1R5N6R1 N-MOSFET Cin1, Cin2 C2012X5R1J106M MLCC Capacitor Cinx C3216X7R1E105K Co1, Co2 6MV2200WG Cboot VJ1206X104XXA Inductor Size Parameters Qty. Vendor TSSOP-14 TSSOP-14 1 NSC SO-8 30V, 13mΩ, 15nC 1 Vishay 7.1x7.1x3.2mm 1.5µH, 6.1A 9.6mΩ 1 TDK 0805 10µF 6.
PAGE 23
LM2742 www.ti.com SNVS266C – MARCH 2004 – REVISED MARCH 2013 Table 3. Bill of Materials for Circuit of Figure 32 (continued) ID Part Number Size Parameters Qty. Vendor Cc2 VJ1206A102KXX Capacitor Type 1206 1nF 10% 1 Vishay Rin CRCW1206100J Resistor 1206 10Ω 5% 1 Vishay Rfadj CRCW12068872F Resistor 1206 88.7kΩ 1% 1 Vishay Rc1 CRCW12062293F Resistor 1206 229kΩ 1% 1 Vishay Rfb1 CRCW12064991F Resistor 1206 4.99kΩ 1% 1 Vishay Rfb2 CRCW12064991F Resistor 1206 4.
PAGE 24
LM2742 SNVS266C – MARCH 2004 – REVISED MARCH 2013 www.ti.com Table 5. Bill of Materials for Circuit of Figure 34 (continued) ID Part Number Size Parameters Qty. Vendor Cc2 VJ1206A681KXX Capacitor Type 1206 680pF 10% 1 Vishay Rin CRCW1206100J Resistor 1206 10Ω 5% 1 Vishay Rfadj CRCW12064992F Resistor 1206 49.9kΩ 1% 1 Vishay Rc1 CRCW12061473F Resistor 1206 147kΩ 1% 1 Vishay Rfb1 CRCW12061492F Resistor 1206 14.9kΩ 1% 1 Vishay Rfb2 CRCW12064991F Resistor 1206 4.
PAGE 25
LM2742 www.ti.com SNVS266C – MARCH 2004 – REVISED MARCH 2013 Table 8. Bill of Materials for Circuit of Figure 36 ID Part Number U1 LM2742 Synchronous Controller Type U2 LM78L05 Voltage Regulator SO-8 Q1/Q2 Si4826DY Assymetric Dual NMOSFET SO-8 Schottky Diode Size Parameters TSSOP-14 Qty. Vendor 1 NSC 1 NSC 30V, 24mΩ/ 8nC Top 16.5mΩ/ 15nC 1 Vishay D1 BAT-54 SOT-23 30V 1 Vishay Lin RLF7030T-1R0N64 Inductor 6.8x7.1x3.2mm 1µH, 6.4A, 7.
PAGE 26
LM2742 SNVS266C – MARCH 2004 – REVISED MARCH 2013 www.ti.com REVISION HISTORY Changes from Revision B (March 2013) to Revision C • 26 Page Changed layout of National Data Sheet to TI format ..........................................................................................................
PAGE 27
PACKAGE OPTION ADDENDUM www.ti.
PAGE 28
PACKAGE OPTION ADDENDUM www.ti.com 5-Nov-2013 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
PAGE 29
PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device LM2742MTCX/NOPB Package Package Pins Type Drawing TSSOP PW 14 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 12.4 Pack Materials-Page 1 6.95 B0 (mm) K0 (mm) P1 (mm) 8.3 1.6 8.0 W Pin1 (mm) Quadrant 12.
PAGE 30
PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM2742MTCX/NOPB TSSOP PW 14 2500 367.0 367.0 35.
PAGE 31
PAGE 32
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.