Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - DC/DC voltage regulator Holder WSON 16

L1:2.2 PH

PGND1

SW1

SGND

PGND2

L2:2.2 PH

SW2

SDA

LM3370

IN1

IN2

4.7 PF

2.7V to 5.5V

IN1

4.7 PF

2.7V to 5.5V

FB2

EN2

EN1

FB1

OUT1

10 PF

OUT2

10 PF

OUT2

OUT1

SCL

nPOR1

IN1

nPOR2

IN2

* Optional Capacitor

4.7 PF

IN1

LM3370

www.ti.com

SNVS406N –NOVEMBER 2005–REVISED MAY 2013

LM3370 Dual Synchronous Step-Down DC-DC Converter

with Dynamic Voltage Scaling Function

Check for Samples: LM3370

FEATURES

APPLICATIONS

• I

C-compatible interface

• Baseband Processors

– V

OUT1

= 1V to 2V in 50 mV Steps • Application Processors (Video, Audio)

– V

OUT2

= 1.8V to 3.3V in 100 mV Steps • I/O Power

– Automatic PFM/PWM Mode Switching and • FPGA Power and CPLD

Forced PWM Mode for Low Noise Operation

DESCRIPTION

– Spread Spectrum Capability Using I

The LM3370 is a dual step-down DC-DC converter

• 600mA Load Per Channel

optimized for powering ultra-low voltage circuits from

• 2MHz PWM Fixed Switching Frequency (Typ.)

a single Li-Ion battery and input rail ranging from 2.7V

• The Bucks Operate 180° Out-of-Phase Timing

to 5.5V. It provides two outputs with 600mA load per

channel. The output voltage range varies from 1V to

Offset for Noise and Input Surge Current

3.3V and can be dynamically controlled using the I

C-

Abatement

compatible interface. This dynamic voltage scaling

• Internal Synchronous Rectification for High

function allows processors to achieve maximum

Efficiency

performance at the lowest power level. The I

C-

• Internal Soft Start

compatible interface can also be used to control auto

PFM-PWM/PWM mode selection and other

• Power-on-Reset Function for Both Outputs

performance enhancing features.

• 2.7V ≤ V

≤ 5.5V

The LM3370 offers superior features and

• Operates from a Single Li-Ion Cell or 3 Cell

performance for portable systems with complex

NiMH/NiCd Batteries and 3.3V/5.5V Fixed Rails

power management requirements. Automatic

• 2.2µH Inductor, 4.7µF Input and 10µF Output

intelligent switching between PWM low-noise and

Capacitor Per Channel

PFM low-current mode offers improved system

• 16-lead WSON Package (4 mm x 5 mm x 0.8 efficiency. Internal synchronous rectification

enhances the converter efficiency without the use of

mm)

further external devices.

• 20-Bump DSBGA Package (3.0 mm x 2.0 mm x

0.6 mm)

Typical Application Circuit

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (35 pages)

PAGE 1
LM3370 www.ti.com SNVS406N – NOVEMBER 2005 – REVISED MAY 2013 LM3370 Dual Synchronous Step-Down DC-DC Converter with Dynamic Voltage Scaling Function Check for Samples: LM3370 FEATURES APPLICATIONS 1 • 2 • • • • • • • • • • • 2 I C-compatible interface – VOUT1 = 1V to 2V in 50 mV Steps – VOUT2 = 1.8V to 3.
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LM3370 SNVS406N – NOVEMBER 2005 – REVISED MAY 2013 www.ti.com DESCRIPTION (CONTINUED) There is a power-on-reset function that monitors the level of the output voltage to avoid unexpected power losses. The independent enable pin for each output allows for simple and effective power sequencing. LM3370 is available in a 4mm by 5mm 16-lead non-pullback WSON and a 20-bump DSBGA, 3.0mm x 2.0mm x 0.6mm, package. A high switching frequency—2 MHz (typ)—allows use of tiny surface-mount components including a 2.
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LM3370 www.ti.com SNVS406N – NOVEMBER 2005 – REVISED MAY 2013 VIN2 1 16 FB2 SW2 2 15 EN2 PGND2 3 14 EN1 VDD 4 13 nPOR2 SGND 5 12 nPOR1 PGND1 6 11 SCL SW1 7 10 SDA VIN1 8 9 FB1 Figure 1.
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LM3370 SNVS406N – NOVEMBER 2005 – REVISED MAY 2013 A B C 1 2 3 4 4 3 2 1 SW1 VIN1 SGND FB1 FB1 SGND VIN1 SW1 A1 A2 A3 A4 A4 A3 A2 A1 PGND1 PGND1_S SDA SCL SCL SDA PGND1_S PGND1 B2 B3 B4 B4 B3 B2 VDD SGND NPOR1 NPOR2 NPOR2 NPOR1 SGND VDD C1 C2 C3 C4 C4 C3 C2 C1 EN2 EN1 EN1 EN2 B1 PGND2 PGND2_S D E www.ti.
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LM3370 www.ti.com SNVS406N – NOVEMBER 2005 – REVISED MAY 2013 I2C Controlled Features Features Parameter Comments Output Voltage VOUT1 and VOUT2 Output voltage is controlled via I2Ccompatible Modes Buck 1 and Buck 2 Mode can be controlled via I2C compatible by either forcing device in Auto mode or forced PWM mode Spread Spectrum Buck 1 and Buck 2 Spread Spectrum capability via I2Ccompatible for noise reduction These devices have limited built-in ESD protection.
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LM3370 SNVS406N – NOVEMBER 2005 – REVISED MAY 2013 www.ti.com Absolute Maximum Ratings (1) (2) (3) −0.2V to 6V VIN1 , VIN2 VDD to PGND and SGND −0.2V to +0.2V PGND to SGND SDA, SCL, EN, EN2, nPOR1, nPOR2, SW1, SW2, FB1 and FB2 Maximum Continuous Power Dissipation (PD_MAX) (4) (GND - 0.2) to (VIN + 0.
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LM3370 www.ti.com SNVS406N – NOVEMBER 2005 – REVISED MAY 2013 Thermal Properties (1) Junction-to-Ambient Thermal Resistance θJA (WSON-16) 26°C/W θJA (20-Bump DSBGA) (1) 50°C/W Junction-to-ambient thermal resistance (θJA) is taken from a thermal modeling result, performed under the conditions and guidelines set forth in the JEDEC standard JESD51-7. The test board is a 4-layer FR-4 board measuring 102 mm x 76 mm x 1.6 mm with a 2 x 1 array of thermal vias. Thickness of copper layers are 2/1/1/2oz.
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LM3370 SNVS406N – NOVEMBER 2005 – REVISED MAY 2013 www.ti.com Typical Performance Characteristics LM3370, Circuit of Typical Application Circuit, VIN = 3.6V, VOUT1 = 1.5V and VOUT2 = 2.5V, L = 2.2 µH (NR3015T2R2M), CIN = 4.7 µF (0805) and COUT = 10 µF (0805) and TA = 25°C, unless otherwise noted. IQ_PFM (Non Switching) Both Channels IQ_PWM (Non Switching) Both Channels 1 0.06 0.05 85oC 0.8 IQ_PWM (mA) IQ_PFM (mA) 85oC 0.04 25oC -30oC 0.03 0.02 25oC -30oC 0.4 0.2 0.01 0 2.7 0.6 3.4 4.1 4.
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LM3370 www.ti.com SNVS406N – NOVEMBER 2005 – REVISED MAY 2013 Typical Performance Characteristics (continued) LM3370, Circuit of Typical Application Circuit, VIN = 3.6V, VOUT1 = 1.5V and VOUT2 = 2.5V, L = 2.2 µH (NR3015T2R2M), CIN = 4.7 µF (0805) and COUT = 10 µF (0805) and TA = 25°C, unless otherwise noted. RDS_ON (WSON) vs. VIN Current Limit vs. VIN 1200 500 450 1150 400 1100 PFET ILIMIT (mA) 300 250 NFET 200 1050 85°C 1000 25°C 950 -40°C 900 150 850 100 800 750 50 0 2.7 3.4 4.
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LM3370 SNVS406N – NOVEMBER 2005 – REVISED MAY 2013 www.ti.com Typical Performance Characteristics (continued) LM3370, Circuit of Typical Application Circuit, VIN = 3.6V, VOUT1 = 1.5V and VOUT2 = 2.5V, L = 2.2 µH (NR3015T2R2M), CIN = 4.7 µF (0805) and COUT = 10 µF (0805) and TA = 25°C, unless otherwise noted. 100 Efficiency vs. Output Current Auto Mode, VOUT1 = 1.5V Efficiency vs. Output Current Auto Mode, VOUT2 = 1.9V Figure 15. Figure 16. Efficiency vs. Output Current Auto Mode, VOUT2 = 3.
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LM3370 www.ti.com SNVS406N – NOVEMBER 2005 – REVISED MAY 2013 Typical Performance Characteristics (continued) LM3370, Circuit of Typical Application Circuit, VIN = 3.6V, VOUT1 = 1.5V and VOUT2 = 2.5V, L = 2.2 µH (NR3015T2R2M), CIN = 4.7 µF (0805) and COUT = 10 µF (0805) and TA = 25°C, unless otherwise noted. Typical Operation Waveform VIN = 3.6V, VOUT1 = 1.5V, VOUT2 = 2.5V, Load = 600 mA Each Startup at PWM for BUCK1 (VIN = 3.6V, VOUT = 1.5V, Load = 200 mA) Figure 21. Figure 22.
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LM3370 SNVS406N – NOVEMBER 2005 – REVISED MAY 2013 www.ti.com Typical Performance Characteristics (continued) LM3370, Circuit of Typical Application Circuit, VIN = 3.6V, VOUT1 = 1.5V and VOUT2 = 2.5V, L = 2.2 µH (NR3015T2R2M), CIN = 4.7 µF (0805) and COUT = 10 µF (0805) and TA = 25°C, unless otherwise noted. 12 Load Transient in PFM MODE (VOUT1 = 1.5V) Load Transient in PFM MODE (VOUT1 = 1.8V) Figure 27. Figure 28. Load Transient in PFM MODE (VOUT1 = 1.8V) Load Transient in PWM MODE (VIN = 3.
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LM3370 www.ti.com SNVS406N – NOVEMBER 2005 – REVISED MAY 2013 Typical Performance Characteristics (continued) LM3370, Circuit of Typical Application Circuit, VIN = 3.6V, VOUT1 = 1.5V and VOUT2 = 2.5V, L = 2.2 µH (NR3015T2R2M), CIN = 4.7 µF (0805) and COUT = 10 µF (0805) and TA = 25°C, unless otherwise noted. Spread Spectrum Enabling (VOUT Signal at 2 MHz) VOUT Stepping (From 1.8V to 3.3V) BUCK2 at 100 mV/STEP No Spread Spectrum 3.3V 11 dB With Spread Spectrum 5 dB/DIV 1.8V RBW = 1 kHz 1.92 1.94 1.
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LM3370 SNVS406N – NOVEMBER 2005 – REVISED MAY 2013 www.ti.com OPERATION DESCRIPTION Device Information The LM3370, a dual high efficiency step-down DC-DC converter, delivers regulated voltages from input rails between 2.7V to 5.5V. Using voltage mode architecture with synchronous rectification, the LM3370 has the ability to deliver up to 600 mA per channel. The performance is optimized for systems where efficiency and space are critical.
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LM3370 www.ti.com SNVS406N – NOVEMBER 2005 – REVISED MAY 2013 PFM Operation At very light loads, the converter enters PFM mode and operates with reduced switching frequency and supply current to maintain high efficiency. The part will automatically transition into PFM mode when either of two conditions are true, for a duration of 32 or more clock cycles: 1. The NFET current reaches zero. 2. The peak PFET switch current drops below the IMODE level .
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LM3370 SNVS406N – NOVEMBER 2005 – REVISED MAY 2013 www.ti.com High PFM Threshold ~1.016*Vout PFM Mode at Light Load Load current increases ZAx is High PFM Voltage Threshold reached, go into sleep mode Nfet on drains conductor current until I inductor=0 Current load increases, draws Vout towards Low2 PFM Threshold Low PFM Threshold, turn on PFET Low2 PFM Threshold Vout Low2 PFM Threshold, switch back to PWM mode xis Z-A Pfet on until Ipfm limit reached Low1 PFM Threshold ~1.
PAGE 17
LM3370 www.ti.com SNVS406N – NOVEMBER 2005 – REVISED MAY 2013 SCL SDA data change allowed data valid data change allowed data valid data change allowed Figure 37. I2C-Compatible START and STOP Conditions START and STOP bits classify the beginning and the end of the I2C session. START condition is defined as SDA signal transitioning from HIGH to LOW while SCL line is HIGH. STOP condition is defined as the SDA transitioning from LOW to HIGH while SCL is HIGH.
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LM3370 SNVS406N – NOVEMBER 2005 – REVISED MAY 2013 www.ti.com I2C-Compatible Write Cycle ack from slave start msb Chip Address lsb w ack ack from slave msb Register Add lsb ack ack from slave msb DATA lsb ack stop ack stop SCL SDA id = K¶xx start addr = K¶02 w ack ack DGGUHVV K¶02 data W = write (SDA = “0”) r = read (SDA = “1”) ack = acknowledge (SDA pulled down by either master or slave) rs = repeated startxx=36h Figure 39.
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LM3370 www.ti.com SNVS406N – NOVEMBER 2005 – REVISED MAY 2013 I2C Chip Address Information MSB LSB ADR6 ADR5 ADR4 ADR3 ADR2 ADR1 ADR0 bit7 bit6 bit5 bit4 bit3 bit2 bit1 0 1 0 0 0 0 1 R/W bit0 2 I C SLAVE address (chip address) Figure 41.
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LM3370 SNVS406N – NOVEMBER 2005 – REVISED MAY 2013 www.ti.com Register 02 MSB 7 LSB 6 5 4 3 2 1 0 Vout for Buck 2 00001 = 1.8V (Min.) 11111 = 3.3V (Max.) Forced PWM Mode (FPWM2) Auto = 0 (default) FPWM2 = 1 (PWM mode only) Disable Por function (DISPOR) DISPOR = 0 enable Por (default) DISPOR = 1 disable Por Bit 7 is not used Figure 43. Table 3. Output Selection Table via I2C Programing Buck Output Voltage Selection Codes (1) 20 Data Code Buck_1 (V) Buck_2 (V) 00000 NA NA 00001 NA 1.
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LM3370 www.ti.com SNVS406N – NOVEMBER 2005 – REVISED MAY 2013 Application Information Setting Output Voltage via I2C-Compatible The outputs of the LM3370 can be programmed through Buck 1 and Buck 2 registers via I2C. Buck 1 output voltage can be dynamically adjusted between 1V to 2V in 50 mV steps and Buck 2 output voltage can be adjusted between 1.8V to 3.3V in 100 mV steps. Finer adjustments to the output of Buck 2 can be achieved with the placement of a resistor between VOUT2 and the FB2 pin.
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LM3370 SNVS406N – NOVEMBER 2005 – REVISED MAY 2013 L >= ( VIN - VOUT IPP )*( VOUT VIN )*( www.ti.com 1 ) f (8) A 2.2 µH inductor with a saturation current rating of at least 1400 mA is recommended for most applications. The inductor’s resistance should be less than around 0.2Ω for good efficiency. Table 4 lists suggested inductors and suppliers. For low-cost applications, an unshielded bobbin inductor is suggested.
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LM3370 www.ti.com SNVS406N – NOVEMBER 2005 – REVISED MAY 2013 Voltage peak-to-peak ripple due to ESR = VPP-ESR = IPP*RESR Voltage peak-to-peak ripple, root mean squared = VPP-RMS = VPP-C2 + VPP-ESR2 (11) Note that the output ripple is dependent on the current ripple and the equivalent series resistance of the output capacitor (RESR).
PAGE 24
LM3370 SNVS406N – NOVEMBER 2005 – REVISED MAY 2013 www.ti.com Spread Spectrum (SS) The LM3370 features Spread Spectrum capability, via I2C, to reduce the noise amplitude of the switching frequency during data transmission. The feature can be enabled by activating the appropriate control register bit (see Table 2 for details). The main clock of the LM3370 features spread spectrum at FOSC = 2 MHz ± 22 kHz ( peak frequency deviation) with the modulation frequency of either 1 kHz (default) or 2 kHz via I2C.
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LM3370 www.ti.com SNVS406N – NOVEMBER 2005 – REVISED MAY 2013 entry angle to prevent debris from being caught in deep corners. Initially, the trace to each pad should be 7 mil wide, for a section approximately 7 mil long or longer, as a thermal relief. Then each trace should neck up or down to its optimal width. The important criteria is symmetry. This ensures the solder bumps on the LM3370 DSBGA package re-flow evenly and that the device solders level to the board.
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LM3370 SNVS406N – NOVEMBER 2005 – REVISED MAY 2013 www.ti.com REVISION HISTORY Changes from Revision M (May 2013) to Revision N • 26 Page Changed layout of National Data Sheet to TI format ..........................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 2-May-2013 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties.
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PACKAGE MATERIALS INFORMATION www.ti.com 11-Oct-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LM3370SD-3013/NOPB WSON NHR 16 1000 178.0 12.4 4.3 5.3 1.3 8.0 12.0 Q1 LM3370SD-3021/NOPB WSON NHR 16 1000 178.0 12.4 4.3 5.3 1.3 8.0 12.0 Q1 LM3370SD-3416/NOPB WSON NHR 16 1000 178.0 12.4 4.3 5.3 1.3 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 11-Oct-2013 Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) LM3370TLX-3006/NOPB DSBGA YZR 20 3000 178.0 8.4 LM3370TLX-3008/NOPB DSBGA YZR 20 3000 178.0 8.4 LM3370TLX-3022/NOPB DSBGA YZR 20 3000 178.0 LM3370TLX-3206/NOPB DSBGA YZR 20 3000 178.0 LM3370TLX-3607/NOPB DSBGA YZR 20 3000 LM3370TLX-3806/NOPB DSBGA YZR 20 3000 W Pin1 (mm) Quadrant 2.18 3.12 0.
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PACKAGE MATERIALS INFORMATION www.ti.com 11-Oct-2013 Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM3370SDX-4221/NOPB WSON NHR 16 4500 367.0 367.0 35.0 LM3370TL-3006/NOPB DSBGA YZR 20 250 210.0 185.0 35.0 LM3370TL-3008/NOPB DSBGA YZR 20 250 210.0 185.0 35.0 LM3370TL-3022/NOPB DSBGA YZR 20 250 210.0 185.0 35.0 LM3370TL-3206/NOPB DSBGA YZR 20 250 210.0 185.0 35.0 LM3370TL-3607/NOPB DSBGA YZR 20 250 210.0 185.0 35.
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MECHANICAL DATA NHR0016B SDA16B (Rev A) www.ti.
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MECHANICAL DATA YZR0020xxx 0.600±0.075 D E TLA20XXX (Rev D) D: Max = 3.025 mm, Min =2.965 mm E: Max = 2.086 mm, Min =2.026 mm 4215053/A NOTES: A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994. B. This drawing is subject to change without notice. www.ti.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.