Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - voltage regulators - DC DC switch controllers VSSOP 8

ISENSE

ADJ

VIN

PGATE

LM3489

GND

PGND

+ +

OUT

IN1

OUT

ADJ

IN2

LM3489

LM3489-Q1

www.ti.com

SNVS443B –MAY 2006–REVISED FEBRUARY 2013

Hysteretic PFET Buck Controller With Enable Pin

Check for Samples: LM3489, LM3489-Q1

FEATURES

DESCRIPTION

The LM3489 is a high efficiency PFET switching

• Easy to use control methodology

regulator controller that can be used to quickly and

• No control loop compensation required

easily develop a small, cost effective, switching buck

• Wide 4.5V to 35V input range

regulator for a wide range of applications. The

hysteretic control architecture provides for simple

• 1.239V to V

adjustable output range

design without any control loop stability concerns

• High efficiency 93%

using a wide variety of external components. The

• ±1.3% (±2% over temp) internal reference

PFET architecture also allows for low component

count as well as ultra-low dropout, 100% duty cycle

• 100% duty cycle operation

operation. Another benefit is high efficiency operation

• Maximum operation frequency > 1MHz

at light loads without an increase in output ripple. A

• Current limit protection

dedicated Enable Pin provides a shutdown mode

drawing only 7µA. Leaving the Enable Pin

• Dedicated enable pin (on if unconnected)

unconnected defaults to on.

• Shutdown mode draws only 7µA supply

current

Current limit protection can be implemented by

measuring the voltage across the PFET’s R

DS(ON)

• VSSOP-8

thus eliminating the need for a sense resistor. A

• LM3489 is AEC-Q100 Grade 1 qualified

sense resistor may be used to improve current limit

accuracy if desired. The cycle-by-cycle current limit

APPLICATIONS

can be adjusted with a single resistor, ensuring safe

operation over a range of output currents.

• Set-Top Box

• DSL or Cable Modem

• PC/IA

• Auto PC

• TFT Monitor

• Battery Powered Portable Applications

• Distributed Power Systems

• Always On Power

• High Power LED Driver

• Automotive

TYPICAL APPLICATION CIRCUIT

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (24 pages)

PAGE 1
LM3489 LM3489-Q1 www.ti.com SNVS443B – MAY 2006 – REVISED FEBRUARY 2013 Hysteretic PFET Buck Controller With Enable Pin Check for Samples: LM3489, LM3489-Q1 FEATURES DESCRIPTION • • • • • • • • • • • The LM3489 is a high efficiency PFET switching regulator controller that can be used to quickly and easily develop a small, cost effective, switching buck regulator for a wide range of applications.
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LM3489 LM3489-Q1 SNVS443B – MAY 2006 – REVISED FEBRUARY 2013 www.ti.com CONNECTION DIAGRAM 1 8 ISENSE VIN 2 7 GND PGATE EN PGND FB ADJ 3 6 4 5 Figure 1. Top View 8-Lead Plastic VSSOP-8 Package Number (DGK) PIN DESCRIPTIONS 2 Pin No. Name Description 1 ISENSE The current sense input pin. This pin should be connected to the PFET drain terminal directly or through a series resistor up to 600 ohm for 28V>Vin>35V. 2 GND 3 EN Enable pin.
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LM3489 LM3489-Q1 www.ti.com SNVS443B – MAY 2006 – REVISED FEBRUARY 2013 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) VIN Voltage −0.3V to 36V PGATE Voltage −0.3V to 36V −0.3V to 5V FB Voltage −1.0V to 36V ISENSE Voltage -1V (<100ns) ADJ Voltage −0.3V to 36V EN Voltage (2) −0.
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LM3489 LM3489-Q1 SNVS443B – MAY 2006 – REVISED FEBRUARY 2013 Electrical Characteristics www.ti.com (1) (2) Specifications in Standard type face are for TJ = 25°C, and in bold type face apply over the full Operating Temperature Range (TJ = −40°C to +125°C). Unless otherwise specified, VIN = 12V, VISNS = VIN − 1V, and VADJ = VIN − 1.1V. Datasheet min/max specification limits are specified by design, test, or statistical analysis. Symbol ISHDN VEN VEN_HYST IQ VFB (3) VHYST VCL_OFFSET Enable rising 1.
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LM3489 LM3489-Q1 www.ti.com SNVS443B – MAY 2006 – REVISED FEBRUARY 2013 Typical Performance Characteristics All curves taken at VIN = 12V with configuration in Design Information. TJ = 25°C, unless otherwise specified. Quiescent Current vs Input Voltage Shutdown Current vs Input Voltage 500 15 VFB = 1.5V, VEN = 5.5V VFB = 1.5V, VEN = 5.5V 400 12 -40°C 25°C 9 IIN (PA) IIN (PA) -40°C 300 125°C 200 25°C 6 125°C 100 3 0 0 0 10 20 30 40 0 10 30 40 VIN (V) VIN (V) Figure 2.
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LM3489 LM3489-Q1 SNVS443B – MAY 2006 – REVISED FEBRUARY 2013 www.ti.com Typical Performance Characteristics (continued) All curves taken at VIN = 12V with configuration in Design Information. TJ = 25°C, unless otherwise specified. Current Limit One Shot OFF Time vs Temperature VIN - VPGATE vs VIN 6 10 5.5 125°C 9.5 VIN -VPGATE (V) TCL (Ps) VIN = 12V VIN = 4.5V 9 VIN = 35V VIN = 24V 5 25°C 4.5 -40°C 4 8.5 3.
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LM3489 LM3489-Q1 www.ti.com SNVS443B – MAY 2006 – REVISED FEBRUARY 2013 Typical Performance Characteristics (continued) All curves taken at VIN = 12V with configuration in Design Information. TJ = 25°C, unless otherwise specified. Efficiency vs Load Current (VOUT = 3.3V, L = 22µH) VOUT Regulation vs Load Current (VOUT = 3.3V, L = 22µH) 100 3.0 VIN = 4.5V 2.0 VIN = 12V 80 1.0 VIN = 24V 'VOUT (%) EFFICIENCY (%) 90 70 60 VIN = 24V 0.0 VIN = 4.5V -1.0 VIN = 12V 50 40 0.0 -2.0 0.2 0.4 0.6 0.
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LM3489 LM3489-Q1 SNVS443B – MAY 2006 – REVISED FEBRUARY 2013 www.ti.com Typical Performance Characteristics (continued) All curves taken at VIN = 12V with configuration in Design Information. TJ = 25°C, unless otherwise specified. Discontinuous Mode Operation (VIN = 12V, VOUT =3.3 V, IOUT = 50mA) Load Transient (VOUT = 3.3 V, 50 mA - 500 mA Load) VOUT RIPPLE (20 mVac/Div) Switch Node Voltage, VD1 (10V/Div) IL (500 mA/Div) TIME (4 Ps/DIV) 8 Figure 20. Figure 21. Enable Transient (VOUT = 3.
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LM3489 LM3489-Q1 www.ti.com SNVS443B – MAY 2006 – REVISED FEBRUARY 2013 SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM FUNCTIONAL DESCRIPTION OVERVIEW The LM3489 is a buck (step-down) DC-DC controller that uses a hysteretic control scheme. The control comparator is designed with approximately 10mV of hysteresis. In response to the voltage at the FB pin, the gate drive (PGATE pin) turns the external PFET on or off.
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LM3489 LM3489-Q1 SNVS443B – MAY 2006 – REVISED FEBRUARY 2013 www.ti.com The LM3489 operates in discontinuous conduction mode at light load current or continuous conduction mode at heavy load current. In discontinuous conduction mode, current through the inductor starts at zero and ramps up to the peak, then ramps down to zero. The next cycle starts when the FB voltage reaches the reference voltage. Until then, the inductor current remains zero and the output capacitor supplies the load.
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LM3489 LM3489-Q1 www.ti.com SNVS443B – MAY 2006 – REVISED FEBRUARY 2013 140 L=22PH PROPOGATION DELAY (ns) 120 L=10PH 100 80 L=4.7PH 60 40 20 0 0 5 10 15 20 25 30 35 INPUT VOLTAGE - OUTPUT VOLTAGE (V) Figure 25. Propagation Delay The operating frequency and output ripple voltage can also be significantly influenced by the speed up capacitor (Cff). Cff is connected in parallel with the high side feedback resistor, R1.
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LM3489 LM3489-Q1 SNVS443B – MAY 2006 – REVISED FEBRUARY 2013 www.ti.com The current limit is activated when the voltage at the ADJ pin exceeds the voltage at the ISENSE pin. The ISENSE comparator triggers the 9µs one shot pulse generator forcing the driver to turn the PFET off. The driver turns the PFET back on after 9µs. If the current has not reduced below the set threshold, the cycle will repeat continuously. A filter capacitor, CADJ, should be placed as shown in Figure 26.
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LM3489 LM3489-Q1 www.ti.com SNVS443B – MAY 2006 – REVISED FEBRUARY 2013 Figure 28. Current Sensing by External Resistor PGATE When switching, the PGATE pin swings from VIN (off) to some voltage below VIN (on). How far the PGATE will swing depends on several factors including the capacitance, on time, and input voltage. PGATE voltage swing will increase with decreasing gate capacitance.
PAGE 14
LM3489 LM3489-Q1 SNVS443B – MAY 2006 – REVISED FEBRUARY 2013 www.ti.com VIN 1 7 PGATE ISENSE 5 R4 8 VEN R3 3 ADJ VIN EN LM3489 FB GND 4 2 PGND 6 Figure 29. Adjustable UVLO DESIGN INFORMATION Hysteretic control is a simple control scheme. However the operating frequency and other performance characteristics highly depend on external conditions and components.
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LM3489 LM3489-Q1 www.ti.com SNVS443B – MAY 2006 – REVISED FEBRUARY 2013 OUTPUT CAPACITOR SELECTION (COUT) The ESR of the output capacitor times the inductor ripple current is equal to the output ripple of the regulator. However, the VHYST sets the first order value of this ripple. As ESR is increased with a given inductance, operating frequency increases as well. If ESR is reduced then the operating frequency reduces. The use of ceramic capacitors has become a common desire of many power supply designers.
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LM3489 LM3489-Q1 SNVS443B – MAY 2006 – REVISED FEBRUARY 2013 www.ti.com The current limit function can be disabled by connecting the ADJ pin to ground and ISENSE to VIN. CATCH DIODE SELECTION (D1) The important parameters for the catch diode are the peak current, the peak reverse voltage, and the average power dissipation. The average current through the diode can be calculated as following.
PAGE 17
LM3489 LM3489-Q1 www.ti.com SNVS443B – MAY 2006 – REVISED FEBRUARY 2013 PCB Layout The PCB board layout is very important in all switching regulator designs. Poor layout can cause switching noise into the feedback signal and generate EMI problems. For minimal inductance, the wires indicated by heavy lines in schematic diagram should be as wide and short as possible. Keep the ground pin of the input capacitor as close as possible to the anode of the catch diode. This path carries a large AC current.
PAGE 18
LM3489 LM3489-Q1 SNVS443B – MAY 2006 – REVISED FEBRUARY 2013 www.ti.com REVISION HISTORY Changes from Revision A (February 2013) to Revision B • 18 Page Changed layout of National Data Sheet to TI format ..........................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.
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PACKAGE MATERIALS INFORMATION www.ti.com 11-Oct-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LM3489MM VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LM3489MM/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LM3489MMX VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 11-Oct-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM3489MM VSSOP DGK 8 1000 210.0 185.0 35.0 LM3489MM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LM3489MMX VSSOP DGK 8 3500 367.0 367.0 35.0 LM3489MMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0 LM3489QMM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LM3489QMMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.
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