Datasheet

6 Hibernation Module .............................................................................................. 242
6.1 Block Diagram ............................................................................................................ 243
6.2 Signal Description ....................................................................................................... 243
6.3 Functional Description ................................................................................................. 244
6.3.1 Register Access Timing ............................................................................................... 244
6.3.2 Clock Source .............................................................................................................. 245
6.3.3 Battery Management ................................................................................................... 246
6.3.4 Real-Time Clock .......................................................................................................... 246
6.3.5 Battery-Backed Memory .............................................................................................. 247
6.3.6 Power Control ............................................................................................................. 247
6.3.7 Initiating Hibernate ...................................................................................................... 247
6.3.8 Interrupts and Status ................................................................................................... 248
6.4 Initialization and Configuration ..................................................................................... 248
6.4.1 Initialization ................................................................................................................. 248
6.4.2 RTC Match Functionality (No Hibernation) .................................................................... 248
6.4.3 RTC Match/Wake-Up from Hibernation ......................................................................... 249
6.4.4 External Wake-Up from Hibernation .............................................................................. 249
6.4.5 RTC/External Wake-Up from Hibernation ...................................................................... 249
6.5 Register Map .............................................................................................................. 249
6.6 Register Descriptions .................................................................................................. 250
7 Internal Memory ................................................................................................... 263
7.1 Block Diagram ............................................................................................................ 263
7.2 Functional Description ................................................................................................. 263
7.2.1 SRAM Memory ............................................................................................................ 263
7.2.2 Flash Memory ............................................................................................................. 264
7.3 Flash Memory Initialization and Configuration ............................................................... 265
7.3.1 Flash Programming ..................................................................................................... 265
7.3.2 Nonvolatile Register Programming ............................................................................... 266
7.4 Register Map .............................................................................................................. 267
7.5 Flash Register Descriptions (Flash Control Offset) ......................................................... 268
7.6 Flash Register Descriptions (System Control Offset) ...................................................... 276
8 General-Purpose Input/Outputs (GPIOs) ........................................................... 289
8.1 Signal Description ....................................................................................................... 289
8.2 Functional Description ................................................................................................. 294
8.2.1 Data Control ............................................................................................................... 295
8.2.2 Interrupt Control .......................................................................................................... 296
8.2.3 Mode Control .............................................................................................................. 297
8.2.4 Commit Control ........................................................................................................... 297
8.2.5 Pad Control ................................................................................................................. 297
8.2.6 Identification ............................................................................................................... 298
8.3 Initialization and Configuration ..................................................................................... 298
8.4 Register Map .............................................................................................................. 299
8.5 Register Descriptions .................................................................................................. 301
9 General-Purpose Timers ...................................................................................... 336
9.1 Block Diagram ............................................................................................................ 337
9.2 Signal Description ....................................................................................................... 338
9.3 Functional Description ................................................................................................. 338
9.3.1 GPTM Reset Conditions .............................................................................................. 338
5June 18, 2012
Texas Instruments-Production Data
Stellaris
®
LM3S8962 Microcontroller
NRND: Not recommended for new designs.