Datasheet

These registers contain the load value for the PWM counter (PWM0LOAD controls the PWM

generator 0 block, and so on). Based on the counter mode, either this value is loaded into the counter

after it reaches zero, or it is the limit of up-counting after which the counter decrements back to zero.

If the Load Value Update mode is immediate, this value is used the next time the counter reaches

zero; if the mode is synchronous, it is used the next time the counter reaches zero after a synchronous

update has been requested through the PWM Master Control (PWMCTL) register (see page 669).

If this register is re-written before the actual update occurs, the previous value is never used and is

lost.

PWM0 Load (PWM0LOAD)

Base 0x4002.8000

Offset 0x050

Type R/W, reset 0x0000.0000

16171819202122232425262728293031

reserved

ROROROROROROROROROROROROROROROROType

0000000000000000Reset

0123456789101112131415

Load

R/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WType

0000000000000000Reset

DescriptionResetTypeNameBit/Field

Software should not rely on the value of a reserved bit. To provide

compatibility with future products, the value of a reserved bit should be

preserved across a read-modify-write operation.

0x00ROreserved31:16

Counter Load Value

The counter load value.

0R/WLoad15:0

685June 18, 2012

Texas Instruments-Production Data

Stellaris

LM3S8962 Microcontroller

NRND: Not recommended for new designs.