Datasheet

Table 21-2. Signals by Signal Name (continued)
DescriptionBuffer Type
a
Pin TypePin NumberPin Name
12.4-kΩ resistor (1% precision) used internally for Ethernet
PHY.
AnalogI41ERBIAS
PWM Fault.TTLI99Fault
Ground reference for logic and I/O pins.Power-9
15
21
33
39
45
54
57
63
69
82
87
94
GND
The ground reference for the analog circuits (ADC, Analog
Comparators, etc.). These are separated from GND to
minimize the electrical noise contained on VDD from affecting
the analog functions.
Power-4
97
GNDA
GND of the Ethernet PHY.Power-42
85
86
GNDPHY
An open-drain output with internal pull-up that indicates the
processor is in Hibernate mode.
ODO51HIB
I
2
C module 0 clock.ODI/O70I2C0SCL
I
2
C module 0 data.ODI/O71I2C0SDA
QEI module 0 index.TTLI100IDX0
QEI module 1 index.TTLI61IDX1
Low drop-out regulator output voltage. This pin requires an
external capacitor between the pin and GND of 1 µF or
greater. The LDO pin must also be connected to the VDD25
pins at the board level in addition to the decoupling
capacitor(s).
Power-7LDO
Ethernet LED 0.TTLO59LED0
Ethernet LED 1.TTLO60LED1
MDIO of the Ethernet PHY.TTLI/O58MDIO
Main oscillator crystal input or an external clock reference
input.
AnalogI48OSC0
Main oscillator crystal output. Leave unconnected when using
a single-ended clock source.
AnalogO49OSC1
GPIO port A bit 0.TTLI/O26PA0
GPIO port A bit 1.TTLI/O27PA1
GPIO port A bit 2.TTLI/O28PA2
GPIO port A bit 3.TTLI/O29PA3
GPIO port A bit 4.TTLI/O30PA4
GPIO port A bit 5.TTLI/O31PA5
GPIO port A bit 6.TTLI/O34PA6
GPIO port A bit 7.TTLI/O35PA7
723June 18, 2012
Texas Instruments-Production Data
Stellaris
®
LM3S8962 Microcontroller
NRND: Not recommended for new designs.