Datasheet

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OBSOLETE

LM4550

www.ti.com

SNAS032F –SEPTEMBER 2001–REVISED APRIL 2013

LM4550 AC '97 Rev 2.1 Multi-Channel Audio Codec with Stereo Headphone Amplifier,

Sample Rate Conversion and National 3D Sound

Check for Samples: LM4550

FEATURES

DESCRIPTION

The LM4550 is an audio codec for PC systems which

• AC '97 Rev 2.1 Compliant

is fully PC99 compliant and performs the analog

• High Quality Sample Rate Conversion From 4

intensive functions of the AC '97 Rev 2.1 architecture.

kHz to 48 kHz in 1 Hz Increments

Using 18-bit Sigma-Delta ADCs and DACs, the

• Supports up to 6 DAC Channel Systems With

LM4550 provides 90 dB of Dynamic Range.

Multiple LM4550s or With Other National

The LM4550 was designed specifically to provide a

LM45xx Codecs

high quality audio path and provide all analog

• Unique National Chaining Function Shares a

functionality in a PC audio system. It features full

Single Controller SDATA_IN Pin Among duplex stereo ADCs and DACs and analog mixers

with access to 4 stereo and 4 mono inputs. Each

Multiple Codecs

mixer input has separate gain, attenuation and mute

• Stereo Headphone Amp With Separate Hain

control and the mixers drive 1 mono and 2 stereo

Control

outputs, each with attenuation and mute control. The

• National's 3D Sound Stereo Enhancement

LM4550 provides a stereo headphone amplifier as

Circuitry

one of its stereo outputs and also supports National's

3D Sound stereo enhancement and a comprehensive

• Advanced Power Management Support

sample rate conversion capability. The sample rate

• External Amplifier Power Down (EAPD)

for the ADCs and DACs can be programmed

Control

separately with a resolution of 1 Hz to convert any

• PC Beep Passthrough to Line Out during

rate in the range 4 kHz – 48 kHz. Sample timing from

Initialization or Cold Reset the ADCs and sample request timing for the DACs

are completely deterministic to ease task scheduling

• Digital 3.3V and 5V Supply Options

and application software development. These

• Extended Temperature: −40°C ≤ T

≤ 85°C

features together with an extended temperature

range also make the LM4550 suitable for non-PC

APPLICATIONS

codec applications.

• Desktop PC Audio Systems on PCI Cards,

The LM4550 features the ability to connect several

AMR Cards, or With Motherboard Chips Sets

codecs together in a system to provide up to 6

Featuring AC Link

simultaneous channels of streaming data on Output

Frames (Controller to Codec) for surround sound

• Portable PC Systems as on MDC Cards, or

applications. Such systems can also support up to 8

With a Chipset or Accelerator Featuring AC

simultaneous channels of streaming data on Input

Link

Frames (Codec to Controller). Multiple codec systems

• General Audio Frequency Systems Requiring

can be built either using the standard AC Link

2, 4 or 6 DAC Channels and/or up to 8 ADC

configuration (i.e. of one serial data signal to the

Channels

Controller per codec) or using a unique National

Semiconductor feature for chaining codecs together.

This chain feature shares only a single data signal to

KEY SPECIFICATIONS

the controller among multiple codecs.

• Analog Mixer Dynamic Range: 97 dB (typ)

The AC '97 architecture separates the analog and

• DAC Dynamic Range: 89 dB (typ)

digital functions of the PC audio system allowing both

• ADC Dynamic Range: 90 dB (typ)

for system design flexibility and increased

• Headphone Amp THD+N at 50 mW: 0.02% (typ)

performance.

into 32Ω

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (39 pages)

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OBSOLETE LM4550 www.ti.com SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 LM4550 AC '97 Rev 2.1 Multi-Channel Audio Codec with Stereo Headphone Amplifier, Sample Rate Conversion and National 3D Sound Check for Samples: LM4550 FEATURES DESCRIPTION • • The LM4550 is an audio codec for PC systems which is fully PC99 compliant and performs the analog intensive functions of the AC '97 Rev 2.1 architecture. Using 18-bit Sigma-Delta ADCs and DACs, the LM4550 provides 90 dB of Dynamic Range.
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OBSOLETE LM4550 SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 www.ti.
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OBSOLETE LM4550 www.ti.com SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 Absolute Maximum Ratings (1) Supply Voltage 6.0V −65°C to +150°C Storage Temperature −0.3V to VDD +0.3V Input Voltage ESD Susceptibility (2) 2000V pin 3 750V ESD Susceptibility (3) 200V pin 3 100V Junction Temperature 150°C Soldering Information LQFP Package Vapor Phase (60 sec.) 215°C Infrared (15 sec.
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OBSOLETE LM4550 SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 www.ti.com Electrical Characteristics The following specifications apply for AVDD = 5V, DVDD = 5V, Fs = 48 kHz, single codec configuration, unless otherwise noted. Limits apply for TA= 25°C. The reference for 0 dB is 1 Vrms unless otherwise specified.
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OBSOLETE LM4550 www.ti.com SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 Electrical Characteristics (continued) The following specifications apply for AVDD = 5V, DVDD = 5V, Fs = 48 kHz, single codec configuration, unless otherwise noted. Limits apply for TA= 25°C. The reference for 0 dB is 1 Vrms unless otherwise specified.(1)(2) Symbol THD Parameter Total Harmonic Distortion LM4550 Conditions Typical (3) VIN = -3 dB, f = 1 kHz, RL = 10 kΩ Frequency Response 0.
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OBSOLETE LM4550 SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 www.ti.com Electrical Characteristics (continued) The following specifications apply for AVDD = 5V, DVDD = 5V, Fs = 48 kHz, single codec configuration, unless otherwise noted. Limits apply for TA= 25°C. The reference for 0 dB is 1 Vrms unless otherwise specified.(1)(2) Symbol Parameter LM4550 Conditions Typical (3) Limit (4) Units (Limits) TBD TBD ns (max) 1.0 µs (min) TBD 162.
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OBSOLETE LM4550 www.ti.com SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 Input: VIH Output: VOH Input: VIL Output: VOL Figure 4. Legend TRST_LOW TRST2CLK RESET# BIT_CLK TSUPPLY2RST DVDD (min), AVDD (min) DVDD, AVDD Figure 5. Power On Reset TRST_LOW TRST2CLK RESET# BIT_CLK Figure 6. Cold Reset TSH TSYNC2CLK SYNC BIT_CLK Figure 7.
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OBSOLETE LM4550 SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 www.ti.com Typical Application AVDD 27 nH. 3.3V or 5V Digital Supply 5V Analog Supply + + 0.1 PF 1 PF Auxiliary Input 1.0 PF Microphone Inputs 1.0 PF 1.0 PF Mono Inputs 1.0 PF 21 22 12 13 LINE_OUT_R CD_L HP_OUT_L CD_GND CD_R HP_OUT_C VIDEO_L HP_OUT_R Z97 Digital Controller 6 8 10 11 MONO_OUT AUX_L 2 1 M: 33 pF 3 40 41 220 PF 1.0 PF 220 PF 37 1.
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OBSOLETE LM4550 www.ti.com SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 APPLICATION HINTS • The LM4550 must be initialized by using RESET# to perform a Power On Reset as shown in the Power On Reset Timing Diagram • VREF must be pulled high to AVDD with a 10 kΩ resistor to ensure correct operation • Don't leave unused inputs floating. Tie all unused inputs together and connect to Analog Ground through a capacitor (e.g. 0.1 µF) • Do not leave CD_GND floating when using the CD stereo input.
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OBSOLETE LM4550 SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 www.ti.com MONO_OUT NC HP_OUT_L HP_OUT_C HP_OUT_R NC NC NC ID0# ID1# EAPD CIN Connection Diagram 48 47 46 45 44 43 42 41 40 39 38 37 DVDD1 1 36 LINE_OUT_R XTL_IN 2 35 LINE_OUT_L XTL_OUT DVSS1 3 34 3DP 4 33 3DN SDATA_OUT 5 32 NC BIT_CLK DVSS2 6 31 NC 30 NC SDATA_IN DVDD2 8 29 LM4550 $& µ97 Rev 2.
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OBSOLETE LM4550 www.ti.com SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 Table 1. ANALOG I/O (continued) Name VIDEO_L VIDEO_R CD_L CD_GND CD_R MIC1 MIC2 LINE_IN_L Pin 16 17 18 19 20 21 22 23 I/O Functional Description I Left Stereo Channel Input This line level input (1 Vrms nominal) is selectable at the left channel of the stereo Record Select Mux for conversion by the left channel ADC.
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OBSOLETE LM4550 SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 www.ti.com Table 1. ANALOG I/O (continued) Name LINE_IN_R LINE_OUT_L LINE_OUT_R MONO_OUT HP_OUT_L Pin I/O Functional Description I Right Stereo Channel Input This line level input (1 Vrms nominal) is selectable at the right channel of the stereo Input Mux for conversion by the right channel ADC. It can also be mixed into the right channel of the Stereo Mix 3D signal at MIX1 under the control of the Line In Volume register, 10h.
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OBSOLETE LM4550 www.ti.com SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 Table 2. DIGITAL I/O AND CLOCKING (continued) Name SDATA_IN SYNC RESET# ID0# ID1# EAPD CIN Pin 8 10 11 45 46 47 48 I/O Functional Description O Output from codec This is the output for AC Link Input Frames from the LM4550 codec to an AC '97 Digital Audio Controller. These frames can contain both codec status data and PCM audio data from the ADCs.
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OBSOLETE LM4550 SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 www.ti.com Table 3. POWER SUPPLIES AND REFERENCES (continued) Name Pin I/O Functional Description VREF 27 O Nominal 2.2 V internal reference Not intended to sink or source current. Use short traces to bypass (3.3 µF, 0.1 µF) this pin to maximize codec performance. This pin must be tied to AVDD with a 10 kΩ pull-up resistor. VREF_OUT 28 O Nominal 2.
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OBSOLETE LM4550 www.ti.com SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 Typical Performance Characteristics ADC Noise Floor DAC Noise Floor Figure 11. Figure 12. ADC Frequency Response DAC Frequency Response Figure 13. Figure 14. Line Out Noise Floor (Analog Loopthrough) Headphone Amplifier Noise Floor (Analog Loopthrough) Figure 15. Figure 16.
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OBSOLETE LM4550 SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) 16 Headphone Amplifier THD+N vs Frequency Headphone Amplifier THD+N vs Output Power Figure 17. Figure 18.
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OBSOLETE LM4550 www.ti.com SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 Table 5.
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OBSOLETE LM4550 SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 www.ti.com Functional Description GENERAL The LM4550 codec can mix, process and convert among analog (stereo and mono) and digital (AC Link format) inputs and outputs. There are four stereo and four mono analog inputs and two stereo and one mono analog outputs. A single codec supports data streaming on two input and two output channels of the AC Link digital interface simultaneously.
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OBSOLETE LM4550 www.ti.com SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 STEREO OUTPUTS The output volume from LINE_OUT and HP_OUT can be muted or adjusted by 0 dB to 45 dB in nominal 3 dB steps under the control of the output volume registers Master Volume (02h) and Headphone Volume (04h) respectively. As with the input volume registers, adjustments to the levels of the two stereo channels can be made independently but both left and right channels share a mute bit (D15).
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OBSOLETE LM4550 SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 www.ti.com Tag Phase Data Phase 20.
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OBSOLETE LM4550 www.ti.com SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 LM4550 samples SYNC assertion LM4550 samples first bit of SDATA_OUT SYNC BIT_CLK Valid Frame SDATA_OUT Slot (1) Slot (2) End of previous Audio Frame Figure 21. Start of AC Link Output Frame Table 6. SLOT 0, OUTPUT FRAME Bit Description 15 Valid Frame 1= Valid data in at least one slot.
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OBSOLETE LM4550 SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 www.ti.com Table 8. SLOT 2, OUTPUT FRAME Bits Description 19:4 Control Register Write Data 3:0 Reserved Comment Controller should stuff with zeros if operation is “read” Set to "0" SDATA_OUT: Slots 3 & 4 – PCM Playback Left/Right Channels Slots 3 and 4 are 20-bit fields used to transmit PCM data to the left and right channels of the stereo DAC when the codec is in Primary mode or Secondary mode 1.
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OBSOLETE LM4550 www.ti.com SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 SDATA_OUT: Slots 5, 10, 11, 12 – Reserved These slots are not used by the LM4550 and should all be stuffed with zeros by the AC '97 Controller. Tag Phase Data Phase 20.
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OBSOLETE LM4550 SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 www.ti.com SDATA_IN: Slot 0 – Codec/Slot Status Bits The first bit (bit 15, “Codec Ready”) of slot 0 in the AC Link Input Frame indicates when the codec's AC Link digital interface and its status/control registers are fully operational. The digital controller is then able to read the LSBs from the Powerdown Control/Stat register (26h) to determine the status of the four main analog subsections.
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OBSOLETE LM4550 www.ti.com SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 Table 13. SLOT 1, INPUT FRAME (continued) Bits 11 Description Comment 0 = Controller should send valid data in Slot 3 of the next Output Frame. Slot 3 Request bit (PCM Left Audio) 10 Slot 4 Request bit (PCM Right Audio) 9 Slot 5 Request bit 8 Slot 6 Request bit (PCM Center) 1 = Controller should not send Slot 3 data. 0 = Controller should send valid data in Slot 4 of the next Output Frame.
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OBSOLETE LM4550 SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 www.ti.com Table 16. SLOT 4, INPUT FRAME Bits Description 19:2 PCM Record Right Channel data Comment 1:0 Reserved 18-bit PCM audio sample from right ADC Stuffed with "0"s by LM4550 SDATA_IN: Slots 5 to 12 – Reserved Slots 5 – 12 of the AC Link Input Frame are not used for data by the LM4550 and are always stuffed with zeros. Register Descriptions Default settings are indicated by *.
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OBSOLETE LM4550 www.ti.com SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 Mute PV3:PV0 0 0000 *0dB attenuation Function 0 1111 45dB attenuation 1 XXXX mute Default: 0000h MIXER INPUT VOLUME REGISTERS (Index 0Ch – 18h) These input registers adjust the volume levels into the stereo mixers MIX1 and MIX2. Each channel may be adjusted over a range of +12dB gain to 34.5dB attenuation in 1.5dB steps. For stereo ports, volumes of the left and right channels can be independently adjusted.
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OBSOLETE LM4550 SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 www.ti.com Table 17. Record Gain Register (1Ch) Mute Gx3:Gx0 0 1111 22.5dB gain Function 0 0000 0dB gain 1 XXXX *mute Default: 8000h GENERAL PURPOSE REGISTER (20h) This register controls many miscellaneous functions implemented on the LM4550.
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OBSOLETE LM4550 SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 www.ti.com Table 18. Common Sample Rates SR15:SR0 Sample Rate (Hz) 1F40h 8000 2B11h 11025 3E80h 16000 5622h 22050 AC44h 44100 *BB80h *48000 CHAIN-IN CONTROL REGISTER (74h) This read/write register is only needed when using the Chain In feature. This feature goes beyond the AC '97 specification and is not required for standard AC Link operation. The two LSBs of this register default to the Codec Identity (ID1, ID0) after reset.
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OBSOLETE LM4550 www.ti.com SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 PR0 controls the powerdown state of the ADC and associated sampling rate conversion circuitry. PR1 controls powerdown for the DAC and the DAC sampling rate conversion circuitry. PR2 powers down the mixer circuits (MIX1, MIX2, National 3D Sound, Mono Out, Line Out). PR3 powers down VREF in addition to all the same mixer circuits as PR2. PR4 powers down the AC Link Digital Interface – see Figure 24 for signal powerdown timing.
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OBSOLETE LM4550 SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 www.ti.com Multiple Codecs EXTENDED AC LINK Up to four codecs can be supported on the extended AC Link. These multiple codec implementations should run off a common BIT_CLK generated by the Primary Codec. All codecs share the AC '97 Digital Controller output signals, SYNC, SDATA_OUT, and RESET#.
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OBSOLETE LM4550 SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 www.ti.
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OBSOLETE LM4550 www.ti.com SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 CODEC CHAINING Using National Semiconductor's unique feature for chaining together codecs, a multiple codec system can be built using fewer interface pins. This Chain feature allows two, three or four codecs to share a single signal input pin at the controller.
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OBSOLETE LM4550 SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 www.ti.
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OBSOLETE LM4550 www.ti.com SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 Test Modes AC '97 Rev 2.1 defines two test modes: ATE test mode and Vendor test mode. Cold Reset is the only way to exit either of them. The ATE test mode is activated if SDATA_OUT is sampled high by the trailing edge (zero-to-one transition) of RESET#. In ATE test mode the codec AC Link outputs SDATA_IN and BIT_CLK are configured to a high impedance state to allow tester control of the AC Link interface for controller testing.
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OBSOLETE LM4550 SNAS032F – SEPTEMBER 2001 – REVISED APRIL 2013 www.ti.com REVISION HISTORY Changes from Revision E (April 2013) to Revision F • 38 Page Changed layout of National Data Sheet to TI format ..........................................................................................................
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