Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - DC/DC voltage regulator Flyback, Forward converter HTSSOP 14

ISOLATED

FEEDBACK

VIN

COMP

GND

VCC

LM5015

BST

PGND

PVIN

Isolated

Output

Input

(4.25V - 75V)

LM5015

www.ti.com

SNVS538C –NOVEMBER 2007–REVISED APRIL 2013

LM5015 High Voltage Monolithic Two-Switch Forward DC-DC Regulator

Check for Samples: LM5015

FEATURES

DESCRIPTION

The LM5015 high voltage switch mode regulator

• Dual Integrated 75V N-Channel MOSFETs

features all the functions necessary to implement

• Ultra-Wide Input Voltage Range: 4.25V to 75V

efficient high voltage Two-Switch Forward and Two-

• Integrated High Voltage Bias Regulator

Switch Flyback regulators, using a minimum of

external components. This easy to use regulator

• Adjustable Output Voltage

integrates high side and low side 75 Volt N-Channel

• 1.5% Feedback Reference Accuracy

MOSFETs with a minimum 1 Amp peak current limit.

• Current Mode Control with Selectable

The voltage across the MOSFETs employed in the

Compensation

two-switch topology is clamped to the input voltage,

allowing the input voltage range to approach the

• Wide Bandwidth Error Amplifier

rating of the MOSFETs. The regulator control method

• Integrated Current Sensing and Limiting

is based on current mode control providing inherent

• 50% Maximum Duty Cycle Limit

ease of loop compensation and line feed-forward for

superior rejection of input transients.

• Single Resistor Oscillator Programming

• Oscillator Synchronization Capability

The operating frequency is set with a single resistor

and is programmable up to 750 kHz. The oscillator

• Programmable Soft-Start

can also be synchronized to an external clock.

• Enable / Under-Voltage Lockout (UVLO) Pin

Additional protection features include cycle-by-cycle

• Thermal Shutdown

current limiting, thermal shutdown, under-voltage

lockout and remote shutdown capability. The device

PACKAGE is available in the HTSSOP-14EP package featuring

an exposed die attach pad to enhance thermal

• HTSSOP-14EP (Exposed Pad)

dissipation.

Typical Application Schematic

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (28 pages)

PAGE 1
LM5015 www.ti.com SNVS538C – NOVEMBER 2007 – REVISED APRIL 2013 LM5015 High Voltage Monolithic Two-Switch Forward DC-DC Regulator Check for Samples: LM5015 FEATURES DESCRIPTION • • • • • • The LM5015 high voltage switch mode regulator features all the functions necessary to implement efficient high voltage Two-Switch Forward and TwoSwitch Flyback regulators, using a minimum of external components.
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LM5015 SNVS538C – NOVEMBER 2007 – REVISED APRIL 2013 www.ti.com Connection Diagram AGND 1 14 SS RT FB 2 13 EN 12 VIN 3 EP 4 COMP 11 VCC 10 BST CFB 5 PGND LO 6 9 HO 7 8 PVIN HTSSOP-14 EP Package Top View PIN DESCRIPTIONS 2 Pin Name Description Application Information 1 AGND Analog ground Internal reference for the regulator control functions. The AGND pin and the PGND pin should be connected directly to minimize switching noise and prevent erratic operation.
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LM5015 www.ti.com SNVS538C – NOVEMBER 2007 – REVISED APRIL 2013 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) VIN to AGND 76V BST to AGND 90V PVIN to HO, LO, PGND 76V HO to PGND (Steady State) -3V to 76V LO to PGND (Steady State) -0.
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LM5015 SNVS538C – NOVEMBER 2007 – REVISED APRIL 2013 www.ti.com Electrical Characteristics Limits in standard type are for TJ = 25°C only; limits in boldface type apply over the junction temperature (TJ) range of −40°C to + 125°C. Minimum and Maximum limits are ensured through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. VVIN = 48V, RRT = 31.6 kΩ unless otherwise stated. See (1).
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LM5015 www.ti.com SNVS538C – NOVEMBER 2007 – REVISED APRIL 2013 Electrical Characteristics (continued) Limits in standard type are for TJ = 25°C only; limits in boldface type apply over the junction temperature (TJ) range of −40°C to + 125°C. Minimum and Maximum limits are ensured through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. VVIN = 48V, RRT = 31.6 kΩ unless otherwise stated. See (1).
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LM5015 SNVS538C – NOVEMBER 2007 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics Demo-board Efficiency vs IOUT and VIN VFB vs Temperature 90 1.28 VIN = 36V 1.27 VFB (V) EFFICIENCY (%) 85 80 VIN = 48V 1.26 VIN = 72V 75 1.25 VOUT = 5.0V FSW = 300 kHz 70 0.5 0 1 1.5 2.0 2.5 1.24 -50 3.0 0 50 100 150 TEMPERATURE (°C) Figure 1. Figure 2.
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LM5015 www.ti.com SNVS538C – NOVEMBER 2007 – REVISED APRIL 2013 Typical Performance Characteristics (continued) ILIM vs VCC vs Temperature ILIM vs VCC 1.4 1.3 VCC = 4.25V 1.2 1.25 ILIM (A) ILIM (A) 1.0 0.8 0.6 0.4 VCC = 7V 1.2 VCC = 14V 1.15 Temperature = 25°C 0.2 1.1 -50 0.0 2 4 6 8 10 12 14 100 TEMPERATURE (°C) Figure 8. Fsw vs RRT Fsw vs Temperature 150 210 205 FREQUENCY (kHz) 100 10 10 100 200 195 190 -50 1000 0 50 100 RT (k:) TEMPERATURE (°C) Figure 9.
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LM5015 SNVS538C – NOVEMBER 2007 – REVISED APRIL 2013 www.ti.com Block Diagram VCC LDO VIN 6 PA VCC Disable 0.45V VDD (+5V) REFERENCE GENERATOR SHUTDOWN EN 1.26V BST 1.26V STANDBY VCC VCC UVLO 3.7V PVIN GATE DRIVE UVLO LOGIC ENABLE DRIVER ENABLE OSCILLATOR WITH SYNC CAPABILITY RT THERMAL LIMIT (165°C) LEVEL SHIFT CLK (50% duty) CLK VDD (+5V) ON TIME DELAY Max Duty 5k CFB HO LO ON Time Delay Max Duty Maximum ON Time VCC ENABLE DRIVER 1.
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LM5015 www.ti.com SNVS538C – NOVEMBER 2007 – REVISED APRIL 2013 FUNCTIONAL DESCRIPTION The LM5015 high voltage switching regulator features all the functions necessary to implement an efficient power converter using a Two-Switch Forward or Two-Switch Flyback topology. The voltage across the MOSFETs employed in the two-switch topology is clamped to the input voltage, allowing the input voltage range to approach the rating of the MOSFETs.
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LM5015 SNVS538C – NOVEMBER 2007 – REVISED APRIL 2013 www.ti.com VPWR 10: PVIN VIN LM5015 0.1PF AGND PGND (a) Analog Input Powered from the Main Power VPWR VBias VIN PVIN LM5015 0.1 PF AGND PGND (b) Analog Input Powered from a Separate Bias Source Figure 14. Analog and Power Input Ports The PVIN and PGND pins are internally connected to the high and low side power MOSFETs, respectively.
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LM5015 www.ti.com SNVS538C – NOVEMBER 2007 – REVISED APRIL 2013 High Side Bootstrap Bias The high side bootstrap bias provides power to drive the high side power MOSFET. An external capacitor is required between the BST and the HO pins. A minimum capacitor value of 0.022 µF is recommended. The capacitor is charged from VCC via an internal diode during each power MOSFET off-time. Oscillator A single external resistor connected between RT and AGND pins sets the LM5015 oscillator frequency.
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LM5015 SNVS538C – NOVEMBER 2007 – REVISED APRIL 2013 www.ti.com FDC_ POLE = 0 Hz 1 2S x R2 x C2 1 FPOLE = §C x C · 2S x R2 x ¨ 1 2¸ ©C1 C2¹ FZERO = VOUT R1 VDD 1.26V PWM 5k FB 1.3V EA C1 COMP R2 C2 RFB LM5015 Figure 15. Type II Compensator When isolation between primary and secondary circuits is required, the Error Amplifier is usually disabled by connecting the FB pin to AGND. This allows the COMP pin to be driven directly by the collector of an optocoupler.
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LM5015 www.ti.com SNVS538C – NOVEMBER 2007 – REVISED APRIL 2013 Power MOSFETs The LM5015 switching regulator includes two N-Channel MOSFETs each with 450 mΩ nominal on-resistance. The drain of the high side MOSFET is the PVIN pin, and the source the HO pin. The drain of the low side MOSFET is the LO pin, and the source is internally connected to the PGND pin via the 42 mΩ internal current sense resistor.
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LM5015 SNVS538C – NOVEMBER 2007 – REVISED APRIL 2013 www.ti.com VIN DH QH LO D1 CIN D2 QL VOUT CO T1 k:1 DL Figure 16. Two-Switch Forward Converter Topology Figure 17 shows the two operating modes of the Two-Switch Forward converter. During operation, the two MOSFETS are turned ON and OFF simultaneously. The output voltage is regulated by modulating the duty cycle of the MOSFETs.
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LM5015 www.ti.com SNVS538C – NOVEMBER 2007 – REVISED APRIL 2013 VIN VOUT ON ON (a) Current Paths when MOSFETs are Turned On VIN VOUT OFF OFF (b) Current Paths when MOSFETs are Turned Off Figure 17. Operating Modes of Two-Switch Forward Converter Note that the power transformer primary receives the voltage of the nearly equal magnitude but opposite polarities during the ON and OFF period of the power MOSFETs.
PAGE 16
LM5015 SNVS538C – NOVEMBER 2007 – REVISED APRIL 2013 www.ti.com EN / UVLO VOLTAGE DIVIDER SELECTION Two dedicated comparators connected to the EN pin are used to implement input under-voltage lockout and a shutdown condition. When the EN pin voltage is below 0.45V, the controller is in a low current shutdown mode where the VIN current is reduced to 110 µA. For an EN pin voltage greater than 0.45V but less than 1.
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LM5015 www.ti.com SNVS538C – NOVEMBER 2007 – REVISED APRIL 2013 LM5015 VPWR R1 1.26V EN 0.45V R2 OFF STANDBY STANDBY SHUTDOWN Figure 19. Remote Standby and Disable Control SOFT-START Soft-start is implemented with an external capacitor CSS connected to the SS pin as shown in Figure 20. The SS discharge MOSFET conducts during Shutdown and Standby modes. When the SS pin is low, the COMP voltage is held below the PWM offset voltage (1.3V) by the SS buffer amplifier, thus inhibiting PWM pulses.
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LM5015 SNVS538C – NOVEMBER 2007 – REVISED APRIL 2013 www.ti.com CONVENTIONAL ISOLATED OUTPUT FEEDBACK DESIGNS When isolation between the primary and secondary circuits is required, the internal error amplifier is usually disabled by connecting the FB pin to AGND, and an external error amplifier is employed on the secondary side of the isolation boundary. An opto-coupler is normally used to send the feedback signal across the isolation boundary, as shown in Figure 21.
PAGE 19
LM5015 www.ti.com SNVS538C – NOVEMBER 2007 – REVISED APRIL 2013 VCC VOUT VDD 1.26V EA 1k PWM 5k FB 1.3V 1k COMP RO1 CFB LMV431A Current Mirror RO2 LM5015 Figure 22. High bandwidth Isolated Feedback Using CFB Pin The two external pull-up and pull-down resistors are effectively connected in parallel for ac signal, yielding a collector resistance on the opto-coupler of 0.5 kΩ.
PAGE 20
LM5015 SNVS538C – NOVEMBER 2007 – REVISED APRIL 2013 www.ti.com Multiple resistors in series or parallel combinations for either RO1, or RO2, or both, may be necessary to set a required output voltage. Note that the accuracy of the output voltage setting is determined by the tolerance of the divider resistors as well as the accuracy of VREF. The accuracy of the LM5015 internal VREF is 1.
PAGE 21
LM5015 www.ti.com SNVS538C – NOVEMBER 2007 – REVISED APRIL 2013 48V ISOLATED TWO-SWITCH FORWARD The Isolated Two-Switch Forward converter shown in Figure 25 utilizes a 1.24V voltage reference (LMV431A) located on the isolated secondary side for the regulation set-point. The LM5015 internal error amplifier is disabled by grounding the FB pin. The LMV431A controls the current through the opto-coupler LED, which sets the COMP pin voltage. The output is +5V at 2.
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LM5015 SNVS538C – NOVEMBER 2007 – REVISED APRIL 2013 www.ti.com Figure 26. Isolated Two-Switch Flyback DC-DC TRANSFORMER The DC-DC transformer shown in Figure 27 provides a 1:1 input voltage to output voltage conversion with ground isolation. The circuit operates in open loop manner operating at the maximum duty cycle limit of the LM5015. The power transformer primary-secondary turns ratio is 1:2 (primary to secondary). Therefore, at the maximum duty cycle of 0.
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LM5015 www.ti.com SNVS538C – NOVEMBER 2007 – REVISED APRIL 2013 REVISION HISTORY Changes from Revision B (April 2013) to Revision C • Page Changed layout of National Data Sheet to TI format ..........................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 11-Oct-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) LM5015MHE/NOPB HTSSOP PWP 14 250 178.0 12.4 LM5015MHX/NOPB HTSSOP PWP 14 2500 330.0 12.4 Pack Materials-Page 1 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 6.95 8.3 1.6 8.0 12.0 Q1 6.95 8.3 1.6 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 11-Oct-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM5015MHE/NOPB HTSSOP PWP LM5015MHX/NOPB HTSSOP PWP 14 250 210.0 185.0 35.0 14 2500 367.0 367.0 35.
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MECHANICAL DATA PWP0014A MXA14A (Rev A) www.ti.
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