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LM5025

UVLO

PGND

AGND

COMP

OUT_A

OUT_B

SYNC

REF

TIME

RAMP

CS1

CS2

35 - 78V

OUT

3.3V

UP/DOWN

SYNC

ERROR

AMP &

ISOLATION

LM5025

www.ti.com

SNVS265B –DECEMBER 2003–REVISED MARCH 2013

Active Clamp Voltage Mode PWM Controller

Check for Samples: LM5025

FEATURES

DESCRIPTION

The LM5025 PWM controller contains all of the

• Internal Start-up Bias Regulator

features necessary to implement power converters

• 3A Compound Main Gate Driver

utilizing the Active Clamp / Reset technique. The

• Programmable Line Under-Voltage Lockout

device can be configured to control either a P-

(UVLO) with Adjustable Hysteresis

Channel clamp switch or an N-Channel clamp switch.

With the active clamp technique, higher efficiencies

• Voltage Mode Control with Feed-Forward

and greater power densities can be realized

• Adjustable Dual Mode Over-Current Protection

compared to conventional catch winding or RDC

• Programmable Overlap or Deadtime between

clamp / reset techniques. Two control outputs are

the Main and Active Clamp Outputs

provided, the main power switch control (OUT_A) and

the active clamp switch control (OUT_B). The active

• Volt x Second Clamp

clamp output can be configured for either a specified

• Programmable Soft-start

overlap time (for P-Channel switch applications) or a

• Leading Edge Blanking

specified deadtime (for N_Channel applications). The

two internal compound gate drivers parallel both MOS

• Single Resistor Programmable Oscillator

and Bipolar devices, providing superior gate drive

• Oscillator UP / DOWN Sync Capability

characteristics. This controller is designed for high-

• Precision 5V Reference

speed operation including an oscillator frequency

range up to 1MHz and total PWM and current sense

• Thermal Shutdown

propagation delays less than 100ns. The LM5025

includes a high-voltage start-up regulator that

PACKAGES

operates over a wide input range of 13V to 90V.

• TSSOP-16

Additional features include: Line Under Voltage

Lockout (UVLO), softstart, oscillator UP/DOWN sync

• WSON-16 (5x5 mm) Thermally Enhanced

capability, precision reference and thermal shutdown.

Typical Application Circuit

Figure 1. Simplified Active Clamp Forward Power Converter

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (23 pages)

PAGE 1
LM5025 www.ti.com SNVS265B – DECEMBER 2003 – REVISED MARCH 2013 Active Clamp Voltage Mode PWM Controller Check for Samples: LM5025 FEATURES DESCRIPTION • • • The LM5025 PWM controller contains all of the features necessary to implement power converters utilizing the Active Clamp / Reset technique. The device can be configured to control either a PChannel clamp switch or an N-Channel clamp switch.
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LM5025 SNVS265B – DECEMBER 2003 – REVISED MARCH 2013 www.ti.com Connection Diagram VIN 1 16 UVLO RAMP 2 15 SYNC CS1 3 14 RT CS2 4 13 COMP TIME 5 12 SS REF 6 11 AGND VCC 7 10 PGND OUT_A 8 9 OUT_B Figure 2. 16-Lead TSSOP, WSON Table 1. Pin Descriptions 2 PIN NAME DESCRIPTION APPLICATION INFORMATION 1 VIN Source Input Voltage Input to start-up regulator. Input range 13V to 90V, with transient capability to 100V.
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LM5025 www.ti.com SNVS265B – DECEMBER 2003 – REVISED MARCH 2013 Table 1. Pin Descriptions (continued) PIN NAME 15 SYNC Oscillator UP/DOWN synchronization input DESCRIPTION The internal oscillator can be synchronized to an external clock with a frequency 20% lower than the internal oscillator’s free running frequency. There is no constraint on the maximum sync frequency.
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LM5025 SNVS265B – DECEMBER 2003 – REVISED MARCH 2013 www.ti.com Block Diagram 7.6V SERIES REGULATOR VIN VCC 5V REFERENCE VCC UVLO UVLO REF LOGIC + - 2.5V UVLO HYSTERESIS (20 PA) VCC OUT_A CLK RT DRIVER OSCILLATOR SYNC SLOPE D TO VIN DEADTIME OR OVERLAP CONTROL FF RAMP RAMP VCC 5V 5k COMP + - OUT_B PWM 1V SS Amp (Sink Only) SS TIME LOGIC S Q R Q DRIVER + 2.5V MAX V*S CLAMP CS1 PGND 0.25V + - CS2 + 0.25V CLK + LEB SS AGND 20 PA SS 19 PA Figure 3.
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LM5025 www.ti.com SNVS265B – DECEMBER 2003 – REVISED MARCH 2013 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) VIN to GND -0.3V to 100V VCC to GND -0.3V to 16V CS1, CS2 to GND -0.3 to 1.00V All other inputs to GND -0.
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LM5025 SNVS265B – DECEMBER 2003 – REVISED MARCH 2013 www.ti.com Electrical Characteristics (continued) Specifications with standard typeface are for TJ = 25°C, and those with boldface type apply over full Operating Junction Temperature range. VIN = 48V, VCC = 10V, RT = 31.3kΩ, RSET = 27.4kΩ) unless otherwise stated (1) Symbol Parameter Conditions Cycle by Cycle Threshold Voltage (CS1) Cycle Skip Threshold Voltage (CS2) Resets SS capacitor; auto restart Min Typ Max Unit 0.22 0.25 0.28 V 0.
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LM5025 www.ti.com SNVS265B – DECEMBER 2003 – REVISED MARCH 2013 Electrical Characteristics (continued) Specifications with standard typeface are for TJ = 25°C, and those with boldface type apply over full Operating Junction Temperature range. VIN = 48V, VCC = 10V, RT = 31.3kΩ, RSET = 27.4kΩ) unless otherwise stated (1) Symbol Parameter Conditions Min Typ Max Unit Output Timing Control Overlap Time RSET = 38 kΩ connected to GND, 50% to 50% transitions 75 105 135 ns Deadtime RSET = 29.
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LM5025 SNVS265B – DECEMBER 2003 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics VCC Regulator Start-up Characteristics, VCC vs Vin VCC vs ICC 16 10 VIN 14 8 12 6 VCC (V) VCC (V) 10 VCC 8 4 6 4 2 2 0 0 0 2 4 6 8 10 12 14 16 0 5 15 ICC (mA) Figure 4. Figure 5. VREF vs IREF 20 25 Oscillator Frequency vs RT 6 1000 5 _ 4 _ FREQUENCY (kHz) VREF (V) 10 VIN (V) 3 2 1 0 100 0 5 10 15 20 25 1 10 IREF (mA) RT (k:) Figure 6. Figure 7.
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LM5025 www.ti.com SNVS265B – DECEMBER 2003 – REVISED MARCH 2013 Typical Performance Characteristics (continued) Dead Time vs Temperature RSET = 29.5K Dead Time vs RSET 140 400 350 130 DEADTIME (ns) DEADTIME (ns) 300 250 200 150 120 110 100 100 90 50 0 0 20 40 60 80 100 80 -40 120 RSET (k:) 25 75 125 o TEMPERATURE ( C) Figure 10. Figure 11. SS Pin Current vs Temperature 26 SS CURRENT (PA) 24 22 20 18 16 14 -40 25 75 125 o TEMPERATURE ( C) Figure 12.
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LM5025 SNVS265B – DECEMBER 2003 – REVISED MARCH 2013 www.ti.com DETAILED OPERATING DESCRIPTION The LM5025 PWM controller contains all of the features necessary to implement power converters utilizing the Active Clamp Reset technique. The device can be configured to control either a P-Channel clamp switch or an NChannel clamp switch. With the active clamp technique higher efficiencies and greater power densities can be realized compared to conventional catch winding or RDC clamp / reset techniques.
PAGE 11
LM5025 www.ti.com SNVS265B – DECEMBER 2003 – REVISED MARCH 2013 Overlap Time (ns) = 2.8 x RSET - 1.2 Dead Time (ns) = 2.9 x RSET +20 RSET in kΩ, Time in ns OUT_A K1 * RSET P-Channel Active Clamp (RSET to GND) K1 * RSET OUT_B OUT_A N-Channel Active Clamp (RSET to REF) K2 * RSET K2 * RSET OUT_B Figure 13.
PAGE 12
LM5025 SNVS265B – DECEMBER 2003 – REVISED MARCH 2013 www.ti.com Volt Second Clamp The Volt x Second Clamp comparator compares the ramp signal (RAMP) to a fixed 2.5V reference. By proper selection of RFF and CFF, the maximum ON time of the main switch can be set to the desired duration. The ON time set by Volt x Second Clamp varies inversely with the line voltage because the RAMP capacitor is charged by a resistor connected to Vin while the threshold of the clamp is a fixed voltage (2.5V).
PAGE 13
LM5025 www.ti.com SNVS265B – DECEMBER 2003 – REVISED MARCH 2013 CS2 SS 20 PA 1 PA Figure 15. Current Limit Oscillator and Sync Capability The LM5025 oscillator is set by a single external resistor connected between the RT pin and GND. To set a desired oscillator frequency (F), the necessary RT resistor can be calculated from: RT = (5725/F)1.026 where • • F is in kHz RT in kΩ (3) The RT resistor should be located very close to the device and connected directly to the pins of the IC (RT and GND).
PAGE 14
LM5025 SNVS265B – DECEMBER 2003 – REVISED MARCH 2013 www.ti.com Thermal Protection Internal Thermal Shutdown circuitry is provided to protect the integrated circuit in the event the maximum junction temperature is exceeded. When activated, typically at 165°C, the controller is forced into a low power standby state with the output drivers and the bias regulator disabled. The device will restart after the thermal hysteresis (typically 25°C).
PAGE 15
LM5025 www.ti.com SNVS265B – DECEMBER 2003 – REVISED MARCH 2013 REVISION HISTORY Changes from Revision A (March 2013) to Revision B • Page Changed layout of National Data Sheet to TI format ..........................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 23-Mar-2014 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.
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PACKAGE MATERIALS INFORMATION www.ti.com 17-May-2014 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing LM5025MTCX TSSOP LM5025MTCX/NOPB LM5025SD/NOPB LM5025SDX/NOPB SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant PW 16 2500 330.0 12.4 6.95 8.3 1.6 8.0 12.0 Q1 TSSOP PW 16 2500 330.0 12.4 6.95 8.3 1.6 8.0 12.0 Q1 WSON NHQ 16 1000 178.0 12.4 5.3 5.3 1.3 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 17-May-2014 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM5025MTCX TSSOP PW 16 2500 367.0 367.0 35.0 LM5025MTCX/NOPB TSSOP PW 16 2500 367.0 367.0 35.0 LM5025SD/NOPB WSON NHQ 16 1000 210.0 185.0 35.0 LM5025SDX/NOPB WSON NHQ 16 4500 367.0 367.0 35.
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MECHANICAL DATA NHQ0016A SDA16A (Rev A) www.ti.
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