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LM5035

UVLO

AGND

PGND

COMP

RAMP

VIN

OVP

SR1

SR2

PWR

ERROR AMP

AND ISOLATION

OUT

LM5035

www.ti.com

SNVS428G –JANUARY 2006–REVISED MARCH 2013

LM5035 PWM Controller with Integrated Half-Bridge and SyncFET Drivers

Check for Samples: LM5035

FEATURES

DESCRIPTION

The LM5035 Half-Bridge Controller/Gate Driver

• 105V / 2A Half-Bridge Gate Drivers

contains all of the features necessary to implement

• Synchronous Rectifier Control Outputs with

half-bridge topology power converters using voltage

Programmable Delays

mode control with line voltage feed-forward. The

• High Voltage (105V) Start-up Regulator

floating high-side gate driver is capable of operating

with supply voltages up to 105V. Both the high-side

• Voltage mode Control with Line Feed-Forward

and low-side gate drivers are capable of 2A peak. An

and Volt • Second Limiting

internal high voltage startup regulator is included,

• Resistor Programmed, 2MHz Capable

along with programmable line undervoltage lockout

Oscillator

(UVLO) and overvoltage protection (OVP). The

oscillator is programmed with a single resistor to

• Patent Pending Oscillator Synchronization

frequencies up to 2MHz. The oscillator can also be

• Programmable Line Under-Voltage Lockout

synchronized to an external clock. A current sense

• Line Over-Voltage Protection

input and a programmable timer provide cycle-by-

• Internal Thermal Shutdown Protection cycle current limit and adjustable hiccup mode

overload protection.

• Adjustable Soft-Start

• Versatile Dual Mode Over-Current Protection

Packages

with Hiccup Delay Timer

• HTSSOP-20EP (Thermally enhanced)

• Cycle-by-Cycle Over-Current Protection

• WQFN-24 (4mm x 5mm)

• Direct Opto-coupler Interface

• 5V Reference Output

Simplified Application Diagram

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (34 pages)

PAGE 1
LM5035 www.ti.com SNVS428G – JANUARY 2006 – REVISED MARCH 2013 LM5035 PWM Controller with Integrated Half-Bridge and SyncFET Drivers Check for Samples: LM5035 FEATURES DESCRIPTION • • The LM5035 Half-Bridge Controller/Gate Driver contains all of the features necessary to implement half-bridge topology power converters using voltage mode control with line voltage feed-forward. The floating high-side gate driver is capable of operating with supply voltages up to 105V.
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LM5035 SNVS428G – JANUARY 2006 – REVISED MARCH 2013 www.ti.
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LM5035 www.ti.com SNVS428G – JANUARY 2006 – REVISED MARCH 2013 PIN DESCRIPTIONS HTSSOP PIN WQFN PIN Name 1 23 RAMP 2 3 24 2 UVLO OVP Description Application Information Modulator ramp signal An external RC circuit from VIN sets the ramp slope. This pin is discharged at the conclusion of every cycle by an internal FET. Discharge is initiated by either the internal clock or the Volt • Second clamp comparator.
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LM5035 SNVS428G – JANUARY 2006 – REVISED MARCH 2013 www.ti.com PIN DESCRIPTIONS (continued) HTSSOP PIN WQFN PIN Name 20 21 VIN Input voltage source Input to the Start-up Regulator. Operating input range is 13V to 100V with transient capability to 105V. For power sources outside of this range, the LM5035 can be biased directly at VCC by an external regulator. EP EP EP Exposed Pad, underside of package No electrical contact. Connect to system ground plane for reduced thermal resistance.
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LM5035 www.ti.com SNVS428G – JANUARY 2006 – REVISED MARCH 2013 Electrical Characteristics Specifications with standard typeface are for TJ = 25°C, and those with boldface type apply over full Operating Junction Temperature range. VVIN = 48V, VVCC = 10V externally applied, RRT = 15.0 kΩ, RDLY = 27.4kΩ, VUVLO = 3V, VOVP = 0V unless otherwise stated (1) (2). Symbol Parameter Conditions Min Typ Max Units VCC voltage IVCC = 10mA 7.3 7.6 7.
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LM5035 SNVS428G – JANUARY 2006 – REVISED MARCH 2013 www.ti.com Electrical Characteristics (continued) Specifications with standard typeface are for TJ = 25°C, and those with boldface type apply over full Operating Junction Temperature range. VVIN = 48V, VVCC = 10V externally applied, RRT = 15.0 kΩ, RDLY = 27.4kΩ, VUVLO = 3V, VOVP = 0V unless otherwise stated(1)(2). Symbol Parameter Conditions Min Typ Max Units PWM Controller (Comp Pin) Delay to output VPWM-OS 80 SS to RAMP offset 0.
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LM5035 www.ti.com SNVS428G – JANUARY 2006 – REVISED MARCH 2013 Typical Performance Characteristics VVCC and VREF vs VVIN VVCC vs IVCC 8 8 7 7 6 6 5 VVCC (V) VREF 4 3 5 4 3 2 2 1 1 0 0 0 5 10 15 20 5 0 10 VVIN (V) Figure 1. VREF vs IREF 30 Frequency vs RT OSCILLATOR FREQUENCY (kHz) 1000 5 4 VREF (V) 25 Figure 2. 6 3 2 1 900 800 700 600 500 400 300 200 100 0 0 0 5 10 15 20 25 0 10 20 IREF (mA) 30 40 Figure 3. Figure 4.
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LM5035 SNVS428G – JANUARY 2006 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) Effective Comp Input Impedance RDLY vs Deadtime 6500 HO / LO TO SR DEADTIME (ns) 350 RESISTANCE (:) 6000 5500 5000 4500 4000 -40 300 250 150 100 T2 50 0 0 40 80 T1 200 120 0 20 40 60 80 100 RDLY (k:) TEMPERATURE (ºC) Figure 7. Figure 8.
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LM5035 www.ti.com SNVS428G – JANUARY 2006 – REVISED MARCH 2013 Block Diagram 7.6V SERIES REGULATOR VIN 0.4V SHUTDOWN 1.25V UVLO-STANDBY UVLO VCC LOGIC VCC/REF UVLO 5V Reference REF 23 PA THERMAL LIMIT (165ºC) 23 PA +5V OVP OVP-STANDBY HB 1.25V HO Q CLK RT/SYNC DRIVER T OSCILLATOR SLOPE PROPORTIONAL TO VIN Timer Q HS VCC S Q R RAMP LO DRIVER FEED-FORWARD RAMP REF VCC 5k COMP 1:1 SR1 PWM 1V SS VCC LOGIC SR2 SS Buffer (Sink Only) UVLOStandby 2.
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LM5035 SNVS428G – JANUARY 2006 – REVISED MARCH 2013 www.ti.com Functional Description The LM5035 PWM controller contains all of the features necessary to implement half-bridge voltage-mode controlled power converters. The LM5035 provides two gate driver outputs to directly drive the primary side power MOSFETs and two signal level outputs to control secondary synchronous rectifiers through an isolation interface.
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LM5035 www.ti.com SNVS428G – JANUARY 2006 – REVISED MARCH 2013 Line Over Voltage / Load Over Voltage / Remote Thermal Protection The LM5035 provides a multipurpose OVP pin that supports several fault protection functions. When the OVP pin voltage exceeds 1.25V, the controller is held in standby mode which immediately halts the PWM pulses at the HO and LO pins. In standby mode, the VCC and REF bias regulators are active while the controller outputs are disabled. When the OVP pin voltage falls below the 1.
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LM5035 SNVS428G – JANUARY 2006 – REVISED MARCH 2013 www.ti.com Overload Protection Timer The LM5035 provides a current limit restart timer to disable the outputs and force a delayed restart (hiccup mode) if a current limit condition is repeatedly sensed. The number of cycle-by-cycle current limit events required to trigger the restart is programmable by the external capacitor at the RES pin. During each PWM cycle, the LM5035 either sources or sinks current from the RES pin capacitor.
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LM5035 www.ti.com SNVS428G – JANUARY 2006 – REVISED MARCH 2013 2.5V Current Limit Detected at CS RES 0V 5V +55 PA #1V +1 PA SS LO HO t1 t2 t3 Figure 13. Current Limit Restart Timing REF 5V FEED-FORWARD RAMP + 5k _ 1V COMP 1:1 LM4041 Voltage feedback PWM COMPARATOR Potential across Optocoupler detector is constant (approx. 4.3V) SOFT-START LM5035 Figure 14.
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LM5035 SNVS428G – JANUARY 2006 – REVISED MARCH 2013 www.ti.com PWM Comparator The pulse width modulation (PWM) comparator compares the voltage ramp signal at the RAMP pin to the loop error signal. This comparator is optimized for speed in order to achieve minimum controllable duty cycles. The loop error signal is received from the external feedback and isolation circuit is in the form of a control current into the COMP pin.
PAGE 15
LM5035 www.ti.com SNVS428G – JANUARY 2006 – REVISED MARCH 2013 Oscillator, Sync Capability The LM5035 oscillator frequency is set by a single external resistor connected between the RT and AGND pins. To set a desired oscillator frequency, the necessary RT resistor is calculated from: § 1 ¨ © FOSC § ¨ © RT = - 110 ns x 6.25 x 109 (2) For example, if the desired oscillator frequency is 400kHz (HO and LO each switching at 200kHz) a 15kΩ resistor would be the nearest standard one percent value.
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LM5035 SNVS428G – JANUARY 2006 – REVISED MARCH 2013 www.ti.com HO SR1 T1 T2 LO SR2 T1 T2 Figure 15. HO, LO, SR1 and SR2 Timing Diagram Synchronous Rectifier Control Outputs (SR1 & SR2) Synchronous rectification (SR) of the transformer secondary provides higher efficiency, especially for low output voltage converters. The reduction of rectifier forward voltage drop (0.5V - 1.5V) to 10mV - 200mV VDS voltage for a MOSFET significantly reduces rectification losses.
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LM5035 www.ti.com SNVS428G – JANUARY 2006 – REVISED MARCH 2013 Thermal Protection Internal Thermal Shutdown circuitry is provided to protect the integrated circuit in the event the maximum rated junction temperature is exceeded. When activated, typically at 165°C, the controller is forced into a low power standby state with the output drivers (HO, LO, SR1 and SR2), the bias regulators (VCC and REF) disabled. This helps to prevent catastrophic failures from accidental device overheating.
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LM5035 SNVS428G – JANUARY 2006 – REVISED MARCH 2013 www.ti.com CURRENT SENSE The CS pin needs to receive an input signal representative of the transformer’s primary current, either from a current sense transformer or from a resistor in series with the source of the LO switch, as shown in Figure 18 and Figure 19. In both cases, the sensed current creates a ramping voltage across R1, and the RF/CF filter suppresses noise and transients.
PAGE 19
LM5035 www.ti.com SNVS428G – JANUARY 2006 – REVISED MARCH 2013 If the current sense resistor method is used, the over-current condition will only be sensed while LO is driving the low-side MOSFET. Over-current while HO is driving the high-side MOSFET will not be detected.
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LM5035 SNVS428G – JANUARY 2006 – REVISED MARCH 2013 www.ti.com PROGRAMMABLE DELAY (DLY) The RDLY resistor programs the delays between the SR1 and SR2 signals and the HO and LO driver outputs. Figure 15 shows the relationship between these outputs. The DLY pin is nominally set at 2.5V and the current is sensed through RDLY to ground. This current is used to adjust the amount of deadtime before the HO and LO pulse (T1) and after the HO and LO pulse (T2). Typically RDLY is in the range of 10kΩ to 100kΩ.
PAGE 21
LM5035 www.ti.com SNVS428G – JANUARY 2006 – REVISED MARCH 2013 VPWR LM5035 R1 1.25V UVLO Disable Output Drivers 23 PA 0.4V R2 Disable VCC and REF Regulators Figure 20. Basic UVLO Configuration VPWR LM5035 5V 23 PA R1 OVP STANDBY 1.25V R2 Figure 21. Basic Over-Voltage Protection VPWR LM5035 R1 UVLO 1.25V Disable Output Drivers 23 PA 0.4V R2 Disable VCC and REF Regulators 5V 23 PA OVP 1.25V STANDBY R3 Figure 22.
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LM5035 SNVS428G – JANUARY 2006 – REVISED MARCH 2013 www.ti.com Table 1. UVO/OVP Divider Formulas R2 + R3 © (11) UVLOon = UVLOoff + (23µA x R1) § R1 OVPoff = 1.25V x ¨¨ Outputs disabled due to VIN rising above OVP threshold + R2 + R 3 R3 © Outputs enabled due to VIN falling below OVP threshold § ¨ ¨ © Outputs enabled due to VIN rising above UVLO threshold + R2 + R 3 § ¨ ¨ © § R1 UVLOoff = 1.
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LM5035 www.ti.com SNVS428G – JANUARY 2006 – REVISED MARCH 2013 Next, the combined resistance of R2 and R3 is calculated by choosing the threshold for the UVLO disabling threshold: 1.25V x R1 RCOMBINED = UVLOoff ± 1.25V (14) Then R3 is determined by selecting the OVP disabling threshold: 1.
PAGE 24
LM5035 SNVS428G – JANUARY 2006 – REVISED MARCH 2013 www.ti.com R2 provides temperature hysteresis by raising the OVP comparator input by R2 x 23µA. For example, if a 22kΩ resistor is selected for R2, then the OVP pin voltage will increase by 22kΩ x 23µA = 506mV. The NTC temperature must therefore fall by 506mV / 25mV per°C = 20°C before the LM5035 switches from the standby mode to the normal mode. VREF LM5035 5V 23 PA NTC THERMISTOR T R2 OVP STANDBY 1.25V R1 Figure 25.
PAGE 25
LM5035 www.ti.com SNVS428G – JANUARY 2006 – REVISED MARCH 2013 The time t2 provides a periodic cool-down time for the power converter in the event of a sustained overload or short circuit. This off time results in lower average input current and lower power dissipation within the power components. It is recommended that the ratio of t2 / (t1 + t3) be in the range of 5 to 10 to take advantage of this feature.
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LM5035 SNVS428G – JANUARY 2006 – REVISED MARCH 2013 www.ti.com Figure 27.
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LM5035 www.ti.com SNVS428G – JANUARY 2006 – REVISED MARCH 2013 REVISION HISTORY Changes from Revision F (March 2013) to Revision G • Page Changed layout of National Data Sheet to TI format ..........................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.
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PACKAGE MATERIALS INFORMATION www.ti.com 11-Oct-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) LM5035MHX/NOPB HTSSOP PWP 20 2500 330.0 16.4 LM5035SQ/NOPB WQFN NHZ 24 1000 178.0 LM5035SQX/NOPB WQFN NHZ 24 4500 330.0 6.95 7.1 1.6 8.0 16.0 Q1 12.4 4.3 5.3 1.3 8.0 12.0 Q1 12.4 4.3 5.3 1.3 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 11-Oct-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM5035MHX/NOPB HTSSOP PWP 20 2500 367.0 367.0 35.0 LM5035SQ/NOPB WQFN NHZ 24 1000 210.0 185.0 35.0 LM5035SQX/NOPB WQFN NHZ 24 4500 367.0 367.0 35.
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MECHANICAL DATA PWP0020A MXA20A (Rev C) www.ti.
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MECHANICAL DATA NHZ0024B SQA24B (Rev A) www.ti.
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