Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - PoE controller TSSOP 16 Controller (PD) DC/DC

DC - DC

Converter

PWM Controller

Current Mode

IEEE 802.3af Interface

UVLO

Signature Detection

Classification

VOUT

Feedback

AUX

Adapter

Jack

Auxiliary

Power

Enable

PoE (+)

PoE (-)

Hot Swap

In-rush and Fault

Current Limiting

LM5071

www.ti.com

SNVS409E –NOVEMBER 2005–REVISED APRIL 2013

LM5071 Power Over Ethernet PD Controller with Auxiliary Power Interface

Check for Samples: LM5071

FEATURES

PACKAGES

• Compatible with 12V AC Adapters

• TSSOP-16

• Fully Compliant 802.3af Power Interface Port

DESCRIPTION

• 80V, 1Ω, 400 mA Internal MOSFET

The LM5071 power interface port and pulse width

• Detection Resistor Disconnect Function

modulation (PWM) controller provides a complete

• Programmable Classification Current

integrated solution for Powered Devices (PD) that

connect into Power over Ethernet (PoE) systems.

• Programmable Under-voltage Lockout with

The LM5071 is specifically designed for the PD

Programmable Hysteresis

that must accept power from auxiliary sources

• Thermal Shutdown Protection

such as AC adapters. The auxiliary power interface

• Auxiliary Power Enable Pin

of the LM5071 activates the PWM controller when the

ac adapter is connected to power the PD when PoE

• Current Mode Pulse Width Modulator

network power is unavailable. The LM5071 integrates

• Supports both Isolated and Non-Isolated

an 80V, 400mA line connection switch and

Applications

associated control for a fully IEEE 802.3af compliant

• Error Amplifier and Reference for Non-Isolated

interface with a full featured current mode pulse width

Applications

modulator dc-dc converter. All power sequencing

requirements between the controller interface and

• Programmable Oscillator Frequency

switch mode power supply (SMPS) are integrated into

• Programmable Soft-Start

the IC.

• 80% Maximum Duty Cycle Limiter, Slope

Compensation (-80 device)

• 50% Maximum Duty Cycle Limiter, No Slope

Compensation (-50 device)

Block Diagram

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (25 pages)

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LM5071 www.ti.com SNVS409E – NOVEMBER 2005 – REVISED APRIL 2013 LM5071 Power Over Ethernet PD Controller with Auxiliary Power Interface Check for Samples: LM5071 FEATURES PACKAGES • • • • • • • 1 2 • • • • • • • • • Compatible with 12V AC Adapters Fully Compliant 802.
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LM5071 SNVS409E – NOVEMBER 2005 – REVISED APRIL 2013 VIN www.ti.com +3.3V LM5071 VIN RSIG VIN < 10V Switch RCLASS Bandgap Regulator VCC Internal High Voltage Regulator 5V - + UVLO SMPS Controller UVLORTN OUT CS AUX VEE Inrush /DC Current Limit VEE RTN COMP RT SS ARTN FB Figure 1. Simplified Block Diagram Connection Diagram VIN 1 16 ARTN RSIG 2 15 SS RCLASS 3 14 RT AUX 4 13 CS UVLO 5 12 COMP UVLORTN 6 11 FB VEE 7 10 VCC RTN 8 9 OUT Figure 2.
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LM5071 www.ti.com SNVS409E – NOVEMBER 2005 – REVISED APRIL 2013 PIN DESCRIPTIONS Pin Name 1 VIN 2 RSIG 3 RCLASS 4 AUX 5 UVLO 6 UVLORTN 7 Description Application Information System high potential input. The diode “OR” of several lines entering the PD, it is the more positive input potential. Signature resistor pin. Connect a resistor from VIN to this pin for signature detection. The resistor is in parallel with the UVLO resistors and should be valued accordingly.
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LM5071 SNVS409E – NOVEMBER 2005 – REVISED APRIL 2013 www.ti.com Absolute Maximum Ratings (1) (2) VIN ,RTN to VEE -0.3V to 80V RSIG to VIN -12V to 0V AUX to VEE -0.3V to 57V UVLO to VEE -0.3V to 13V RCLASS to VEE -0.3V to 7V ARTN to RTN -0.3V to 0.3V VCC, OUT to ARTN -0.3V to 16V All other inputs to ARTN -0.
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LM5071 www.ti.com SNVS409E – NOVEMBER 2005 – REVISED APRIL 2013 Electrical Characteristics (1) Specifications in standard type face are for TJ = +25°C and those in boldface type apply over the full operating junction temperature range. Unless otherwise specified: VIN = 48V, VCC = 10V, RT = 30.3kΩ. Symbol Parameter Conditions Min Typ Max Units Powered Interface IOS Offset Current VIN < 10.
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LM5071 SNVS409E – NOVEMBER 2005 – REVISED APRIL 2013 www.ti.com Electrical Characteristics(1) (continued) Specifications in standard type face are for TJ = +25°C and those in boldface type apply over the full operating junction temperature range. Unless otherwise specified: VIN = 48V, VCC = 10V, RT = 30.3kΩ. Symbol Parameter Conditions Min Typ Max Units Leading Edge Blanking Time 55 ns CS Sink Impedance (clocked) 25 55 Ω 7 10 13 uA Frequency1 (RT = 30.
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LM5071 www.ti.com SNVS409E – NOVEMBER 2005 – REVISED APRIL 2013 Typical Performance Characteristics Default Current Limit vs Temperature Oscillator Frequency vs RT Resistance OSCILLATOR FREQUENCY (kHz) 400 DEFAULT CURRENT LIMIT (mA) 395 390 385 380 375 370 365 1000 800 600 400 200 0 360 -40 -20 0 20 40 60 80 0 100 120 5 10 15 20 25 30 35 40 45 50 RT RESISTANCE (k:) TEMPERATURE (oC) Figure 3. Figure 4. UVLO Hysteresis Current vs Temperature Softstart Current vs Temperature 12 11.
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LM5071 SNVS409E – NOVEMBER 2005 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) VCC vs ICC Input Current vs Input Voltage 9 3 8 INPUT CURRENT (mA) 2.5 VCC (V) 7 6 5 4 3 2 1.5 1 0.5 2 1 0 0 5 10 15 20 25 0 10 20 30 40 50 60 70 80 INPUT VOLTAGE (V) ICC (mA) Figure 9. Figure 10. UVLO Threshold vs Temperature 2.05 2.04 2.03 UVLO VTH (V) 2.02 2.01 2.00 1.99 1.98 1.97 1.96 1.95 -60 -40 -20 0 20 40 60 80 100 120 140 TEMPERATURE (oC) Figure 11.
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LM5071 www.ti.com SNVS409E – NOVEMBER 2005 – REVISED APRIL 2013 Specialized Block Diagrams VIN 5 + EN _ VBG + 2V - VCC 10 PA UVLO + + _ + _ 2.5V VEE VCC FB COMP RTN ARTN FB _ 350 k: OUT 1V Hysteresis COMP + AUX Gate Control CS force_enable _ OUT CS Thermal Limit SS 10V VIN See Figure 4 1.5V + RSIG Power OK _ RCLASS SMPS Controller RT 1.5V SS + EN LOCAL_EN VIN RT UVLORTN LT25V 2V - 60V Figure 12.
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LM5071 SNVS409E – NOVEMBER 2005 – REVISED APRIL 2013 www.ti.com RT Slope Compensation Generator 45 PA 0 OSC VCC CLK -50 Device Has No Slope Compensation 80% MAX DUTY LIMIT (-80) 50% MAX DUTY LIMIT (-50) 5V 5k 1.25V FB Q R Q DRIVER OUT PWM 100k + - S 1.4V + LOGIC 50k SS 10 PA SS SS COMP 2k 0.5V + - CURRENT LIMIT CS CLK +LEB Figure 13.
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LM5071 www.ti.com SNVS409E – NOVEMBER 2005 – REVISED APRIL 2013 DETAILED OPERATING DESCRIPTION The LM5071 power interface port and pulse width modulation (PWM) controller provides a complete integrated solution for Powered Devices (PD) that connect into Power over Ethernet (PoE) systems. Major features of the PD interface portion of the IC include detection, classification, thermal limit, programmable undervoltage lockout, and current limit monitoring.
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LM5071 SNVS409E – NOVEMBER 2005 – REVISED APRIL 2013 www.ti.com Classification To classify the PD, the PSE will present a voltage between 14.5V and 20.5V to the PD. The LM5071 enables classification mode at a nominal input voltage of 11.5V. An internal 1.5V linear regulator and an external resistor connected to the RCLASS pin provide classification programming current. Table 1 shows the external classification resistor required for a particular class.
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LM5071 www.ti.com SNVS409E – NOVEMBER 2005 – REVISED APRIL 2013 +AUX +PoE VCC VIN +V OUT LM 5071 RCLASS SS UVLO RT COMP UVLORTN CS 100 k: FB AUX ARTN RTN 100 k: -PoE OUT VEE - AUX 0.1 PF Figure 14. Simplified Schematic Showing Auxiliary Implementation Power Supply Operation Once the UVLO threshold has been satisfied, the interface controller of the LM5071 will charge up the SMPS input capacitor through the internal power MOSFET.
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LM5071 SNVS409E – NOVEMBER 2005 – REVISED APRIL 2013 www.ti.com +AUX +PoE VCC VIN +V OUT LM 5071 RCLASS SS UVLO RT COMP UVLORTN CS 100 k: FB AUX ARTN RTN 100 k: -PoE OUT VEE - AUX 0.1 PF Figure 15. Simplified Schematic Showing Low Voltage Auxiliary Supply Error Amplifier An internal high gain error amplifier is provided within the LM5071. The amplifier’s non-inverting reference is set to a fixed reference voltage of 1.25V. The inverting input is connected to the FB pin.
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LM5071 www.ti.com SNVS409E – NOVEMBER 2005 – REVISED APRIL 2013 Oscillator, Shutdown and Sync Capability A single external resistor connected between the RT and ARTN pins sets the LM5071 oscillator frequency. Internal to the LM5071–50 device (50% duty cycle limited option) is an oscillator divide by two circuit. This divide by two circuit creates an exact 50% duty cycle clock which is used internally to create a precise 50% duty cycle limit function.
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LM5071 SNVS409E – NOVEMBER 2005 – REVISED APRIL 2013 www.ti.com Thermal Protection Internal thermal shutdown circuitry is provided to protect the integrated circuit in the event the maximum junction temperature is exceeded. This feature prevents catastrophic failures from accidental device overheating.
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LM5071 www.ti.com SNVS409E – NOVEMBER 2005 – REVISED APRIL 2013 Figure 17. Dual Isolated Output with Diode Rectification Figure 18.
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LM5071 SNVS409E – NOVEMBER 2005 – REVISED APRIL 2013 www.ti.com REVISION HISTORY Changes from Revision D (April 2013) to Revision E • 18 Page Changed layout of National Data Sheet to TI format ..........................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 7-May-2014 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-May-2014 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LM5071MTX-50/NOPB TSSOP PW 16 2500 330.0 12.4 6.95 8.3 1.6 8.0 12.0 Q1 LM5071MTX-50/NOPB TSSOP PW 16 2500 330.0 12.4 6.95 8.3 1.6 8.0 12.0 Q1 LM5071MTX-80/NOPB TSSOP PW 16 2500 330.0 12.4 6.95 8.3 1.6 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-May-2014 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM5071MTX-50/NOPB TSSOP PW 16 2500 367.0 367.0 35.0 LM5071MTX-50/NOPB TSSOP PW 16 2500 367.0 367.0 35.0 LM5071MTX-80/NOPB TSSOP PW 16 2500 367.0 367.0 35.
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